Patent
Mos-type integrated circuit
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TLDR
In this paper, a double diffusion MOSFET of an n-channel type and a drain and a gate of a p-channel MOS-FET are connected in an island region surrounded by an n type annular contact region having high impurity concentration.Abstract:
In a MOS-type integrated circuit, a source and a gate of a double diffusion MOSFET of an n-channel type and a drain and a gate of a double diffusion MOSFET of a p-channel type are in an island region surrounded by an n-type annular contact region having high impurity concentration. An n epitaxial layer, in each island region, is used for the sources and drains of both MOSFETs. The drain electrode of the p-channel MOSFET is connected to the gate electrode of the n-channel MOSFET. With this structure, the power consumption of the circuit is decreased, and the operating speed thereof is increased.read more
Citations
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References
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Patent
Monolithic integration of logic, control and high voltage interface circuitry
TL;DR: In this paper, the integration of digital logic circuitry, precision control circuitry, and high voltage interface circuits on the same semiconductor chip is achieved, using various combinations selected from D-MOS, vertical NPN, lateral NPNs, PNP, P-MISO, N-MOC, and J-FET components.
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Integrated circuit structure comprising CMOS transistors having high blocking voltage capability and method of fabrication of said structure
TL;DR: In this article, an integrated circuit structure includes both low-voltage n-channel and p-channel MOS transistors (LV-NMOS), and highvoltage hV-n-channel transistors and HV-PMOS transistor (HV-NMS transistors).
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TL;DR: In this article, a semiconductor device is provided which has a power insulated-gate MOS field effect transistor and a control semiconductor element formed in a common semiconductor substrate, and the electrical characteristics of each element integrated in the devices are substantially equal to the same element in discrete form.