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Patent

Phase-locked loop oscillator

TLDR
In this article, a phase-locked loop oscillator circuit including a voltage controlled oscillator and a reference frequency source is presented, from each of which a signal is derived and the phases of these two signals are compared in a phase detector, the output of which is applied through a loop filter to a frequency modulation input of the VOC.
Abstract
In a typical phase-locked loop oscillator circuit including a voltage controlled oscillator and a reference frequency source, from each of which a signal is derived and the phases of these two signals are compared in a phase detector, the output of which is applied through a loop filter to a frequency modulation input of the voltage controlled oscillator, so that the frequency of the voltage controlled oscillator is precisely controlled by the reference frequency; an improvement which comprises a maximum phase error detector which determines a maximum permitted phase error between the two inputs to the phase detector, and a phase error corrector circuit which, in response to the presence of a maximum permitted phase error, will shift the phase of one of the two signals applied to the phase detector relative to the source of that signal, such as to hold the phase error into the phase detector within the permitted maximum. This causes the voltage controlled oscillator to shift its frequency to the lock-up frequency in a smooth and steady manner. The improvement prevents operation of the system from being disrupted when the circuit falls out of lock, such as when the modulating signal has large low frequency components. The circuit also includes an out-of-lock detector which responds essentially instantaneously to an in-lock and out-of-lock condition and a means for altering the characteristics of the loop filter in order to minimize the effect of the out-of-lock condition upon the voltage controlled oscillator.

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Citations
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Patent

Wide range clock recovery circuit

TL;DR: In this article, a variable rate clock recovery circuit for NRZ data is provided having a PLL and a frequency synthesizer which share control of a common VCO in single loop realization.
Patent

Fast lock PLL having out of lock detector control of loop filter and divider

TL;DR: In this paper, a phase-locked loop comprises a reference source that produces a signal at a fixed frequency that is applied to a phase detector, which is compared in the phase detector with a divided quotient signal that is proportional to the output of a voltage-controlled oscillator.
Patent

Monolithic phase-locked loop

David C. Soo
TL;DR: A phase-locked loop (PLL) circuit as mentioned in this paper includes a sampled-data phase detector, a sampled data loop filter, a voltage controlled oscillator driven by the output of the loop filter and a frequency divider in the feedback loop.
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Clock holdover circuit

TL;DR: In this article, a clock holdover circuit is proposed to provide a replacement clock signal within predetermined parameters independently of time and temperature variations, and the clock is phase compared to the reference signal so that no loss of phase occurs.
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Clock signal loss detection and recovery apparatus in multiple clock signal system

TL;DR: In this article, a clock signal failure detection and recovery circuit for use in a system utilizing multiple, redundant clock signals is presented. But the circuit is not suitable for the case of a single clock signal, since the clock signal present pulse can still be clocked into the monitoring circuitry when that particular clock signal has failed.
References
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Patent

Phase-locked loop circuit

TL;DR: In this article, a phase comparator with an operation range with specific limits for phase comparing is used to detect any exceeding of a specific limit of the phase by comparing the operation range of phase comparators with a phase deviation of the oscillator output signal fed to the phase detector.
Patent

Slow switch for bandwidth change in phase-locked loop

TL;DR: In this paper, a phase-locked loop circuit is presented, which utilizes a voltage controlled oscillator controlled by a pair of loop filters, one passing a narrow range of frequencies and the other passing a wide range.
Patent

Phase locked loop lock detector and method

TL;DR: In this article, the input frequency and the VCO frequency of a phase-locked loop are combined by a difference multiplier to produce a signal having their difference frequency, and an inhibit signal which prevents the binary counter from continuing to count is generated when the predetermined count limit has been reached in any one monitored time period.
Patent

Wideband phase locked loop transmitter system

TL;DR: In this paper, a phase-locked loop including a reference oscillator connected to one input of a loop phase detector, the output of which is connected through an integrating low pass filter to a voltage controlled oscillator with the output being mixed with a second frequency and compared to the reference in the loop phase detectors.