Patent
Signal generator for generating a jitter/wander output
TLDR
In this article, a phase-locked loop was proposed for generating an output having jitter and wander. But the phase detector was not included in the phase lock loop, and the phase summing node was not coupled with the phase detectors.Abstract:
A signal generator has a variable reference oscillator, a variable oscillator and a phase locked loop for generating an output having jitter and wander. The variable reference oscillator generates a reference having a varying phase offset over a first phase modulation frequency interval and a constant output over a second phase modulation frequency interval. The variable oscillator generates a constant output over the first phase modulation frequency interval and a variable output over the second phase modulation frequency interval. The phase locked loop includes a phase detector, a phase summing node and oscillator with the phase detector coupled to receive the outputs of the variable reference oscillator and the oscillator, and phase summing node coupled to receive the outputs of the variable oscillator and the phase detector. The output of the phase locked loop tracks the variable reference oscillator over the first phase modulation frequency interval and generates a phase modulated output in response to the variable output of the variable oscillator over the second phase modulation frequency interval.read more
Citations
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Patent
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Patent
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References
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Patent
Voltage control oscillator which suppresses phase noise caused by internal noise of the oscillator
TL;DR: In this paper, a phase-locked loop (PLL) was used to synthesize a frequency synthesizer composed of a reference oscillator, the first and second integrators, a binary adder, a low pass filter and a VCO.
Patent
Frequency modulation in phase-locked loops
TL;DR: In this paper, a phase-locked loop (PLL) frequency synthesizer with an analog, out-of-band component path and a digital, in-band path to provide frequency modulation (FM) of the synthesized output signal is described.
Patent
Frequency synthesizer using an arithmetic frequency synthesizer and plural phase locked loops
TL;DR: In this paper, a frequency synthesizer for controlling the frequency f 0 of a signal e 0 in response to a control signal e c 2 to produce a band of selectable frequencies separated by Δ f between the frequencies f x and f y, where (f x + RΔf)=f 0 and R is zero or any integer ≦(f y -f x )/Δ f.
Patent
Data communication systems
TL;DR: In this paper, a clock phase modulating unit modulates the phase of the clock signal output by a clock signal generator, which is fed to the repeating unit to control the rate at which data is output onto the data communication system.
Patent
Method and circuit arrangement to generate a phase modulated or frequency modulated signal
TL;DR: In this paper, the authors proposed a method to generate a phase modulated or frequency modulated signal directly with a PLL frequency synthesizer using a very dense output frequency (f x ) raster, so that the pulses received in the phase comparator (63) both from the reference signal (f o ) branch and from the voltage controlled oscillator VCO (65) are lengthened in lengthening means (62, 69, 67, 68; k 1, L+ΔL; k 2, L) by a desired amount.