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Patent

Signal processing apparatus and method for iteratively determining Arithmetic Fourier Transform

TLDR
In this article, a signal processing apparatus and method for iteratively determining the inverse Arithmetic Fourier Transform (AFT) of an input signal by converting the input signal, which represents Fourier coefficients of a function that varies in relation to time, space, or other independent variable, into a set of output signals representing the values of a Fourier series associated with the input signals.
Abstract
A signal processing apparatus and method for iteratively determining the inverse Arithmetic Fourier Transform (AFT) of an input signal by converting the input signal, which represents Fourier coefficients of a function that varies in relation to time, space, or other independent variable, into a set of output signals representing the values of a Fourier series associated with the input signal. The signal processing apparatus and method utilize a process in which a data set of samples is used to iteratively compute a set of frequency samples, wherein each computational iteration utilizes error information which is calculated between the initial data and data synthesized using the AFT. The iterative computations converge and provide AFT values at the Farey-fraction arguments which are consistent with values given by a zero-padded Discrete Fourier Transform (DFT), thus obtaining dense frequency domain samples without interpolation or zero-padding.

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References
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Patent

High speed signal processor

TL;DR: In this paper, a high speed signal processor contains a set of repetitive architecture functional units including an input data storage unit for storing quantized data values, a data shifting unit, an output data accumulator and a control code generator.
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TL;DR: In this article, an apparatus for performing a Fourier transform using Cordic techniques is presented, where digital words are pipelined through serial add/subtract stages to provide vector rotations without trignometric lookup tables or multiply operations.
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Parallel transfer analyzer for performing the chirp Z transform

TL;DR: P-point transform analyzer using M N-point serial transform devices in parallel, the output signals therefrom being combined in K J-point transducers in parallel as mentioned in this paper, where M, N, K, and J are integers other than one such that M×N=K×J=P.
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Signal processing apparatus for generating a fourier transform

TL;DR: In this paper, a bank of delay filters whose outputs are selectively connected to the inputs of the accumulating circuit each of which produces one of the desired Fourier coefficients is presented. But the authors do not specify the number of filters to be connected.