Patent
System and method for dynamically identifying free registers
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In this paper, a depth-first search of a flow diagram representing the execution of a program is performed, and the search proceeds simultaneously for all the registers and identifies the free registers from the search.Abstract:
A system and method for identifying free registers within a program. A depth first search of a flow diagram representing the execution of a program is performed. The search proceeds simultaneously for all the registers and identifies the free registers from the search. The free registers may then be utilized for various applications without saving and restoring the contents of these registers to memory. The system may limit the amount of time spent searching for free registers with a timer.read more
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References
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Patent
Use of dynamic translation to collect and exploit run-time information in an optimizing compilation system
TL;DR: In this paper, a dynamic translation is used to produce profile information used to optimize object code for an application, which is used in the generation of profile information about the application, and then the second object code is executed to produce the profile information.
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A data processor for performing simultaneous instruction retirement and backtracking
TL;DR: In this paper, a register inventory system is used to monitor the allocation state changes of each of the physical registers in a register file and return those physical registers to a free pool for future allocation.
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Register mapping system having a log containing sequential listing of registers that were changed in preceding cycles for precise post-branch recovery
Simon C. Steely,David J. Sager +1 more
TL;DR: In this paper, a register map has a free list of available physical locations in a register file, a log containing a sequential listing of logical registers changed during a predetermined number of cycles, a back-up map associating the logical registers with corresponding physical homes at a backup point in a computer pipeline operation and a predicted map associated the logical register with corresponding locations at a current point in the computer pipeline operations.
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Compiler allocating a register to a data item used between a use and store of another data item previously allocated to the register
TL;DR: In this article, a compiler includes a front end for converting the input code to an intermediate representation, then this input representation is traversed to identify all of the temporary items, and to find all the holes in the temporary item.
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Register allocation methods having upward pass for determining and propagating variable usage information and downward pass for binding; both passes utilizing interference graphs via coloring
TL;DR: In this article, the authors present methods for allocating physical registers within a compiler phase to achieve efficient operation of a target CPU, and allocate variables between physical registers and memory to accommodate local as well as global code structure.