Patent
Virtualizing physical memory in a virtual machine system
Steven M. Bennett,Andrew V. Anderson,Gilbert Neiger,Sankaran Rajesh M,Richard Uhlig,Larry Smith,Scott D. Rodgers +6 more
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TLDR
In this article, a processor including a virtualization system of the processor with a memory virtualization support system is used to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executed on a host machine in which the processor is operable to a reference reference to host-Physical memory of the host machine.Abstract:
A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a reference to host-physical memory of the host machine.read more
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Patent
Method and system for a second level address translation in a virtual machine environment
TL;DR: In this paper, the authors present a method of address translation from a guest virtual address to a host physical address in a virtual machine environment, which uses the hardware oriented method of the host CPU to determine the guest physical address.
Patent
Monitoring a data structure in a virtual machine
TL;DR: In this paper, a method for monitoring a data structure maintained by guest software within a virtual machine is disclosed, such as by placing write traces on the memory pages containing the data structure.
Patent
System and method for component authentication of a secure client hosted virtualization in an information handling system
Yuan-Chang Lo,Shree Dandekar +1 more
TL;DR: A client hosted virtualization system (CHVS) as mentioned in this paper includes a processor to execute code, a security processor, a component that includes a certificate, and a non-volatile memory.
Patent
Controlling memory conditions in a virtual machine
TL;DR: In this paper, a resource reservation application running as a guest application on the virtual machine reserves a location in guest virtual memory and the corresponding physical memory can be reclaimed and allocated to another virtual machine.
Patent
Facilitating processing within computing environments supporting pageable guests
Ingo Adlung,Jong Hyuk Choi,Hubertus Franke,Lisa C. Heller,William A. Holder,Ray Mansell,Damian L. Osisek,Randall W. Philley,Martin Schwidefsky,Gustav E. Sittmann +9 more
TL;DR: In this paper, a computing environment that supports pageable guests is facilitated processing is facilitated in many ways, including, but not limited to, associating guest and host state information with guest blocks of storage.
References
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Patent
Memory addressing for a virtual machine implementation on a computer processor supporting virtual hash-page-table searching
TL;DR: In this paper, a software monitor, interposed between the hardware layer of a computer system and one or more guest operating systems, constructs and maintains a guest-physical address-to-host-physical-address map for each guest operating system, and maintains virtual memory addressing context for each operating system that may include a virtual-hash-page table for each host operating system.
Patent
Method and system for caching address translations from multiple address spaces in virtual machines
TL;DR: In this article, the authors propose a method of virtualizing memory through shadow page tables that cache translations from multiple guest address spaces in a virtual machine including a software version of a hardware tagged translation look-aside buffer.
Patent
Virtual translation lookaside buffer
Gilbert Neiger,Stephen Chou,Erik Cota-Robles,Stalinselvaraj Jeyasingh,Alain Kagi,Michael Kozuch,Richard Uhlig,Sebastian Schoenberg +7 more
TL;DR: In this article, a method for supporting address translation in a virtual-machine environment includes creating a guest translation data structure to be used by a guest operating system for address translation operations, and creating an active translation data structures based on the guest data structure.
Patent
Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations
TL;DR: In this paper, the look aside buffer (TLB) hardware is provided in a central processor that receives the results of double-level address translations to eliminate the need for having shadow tables for the second-level in a virtual machine (VM) environment.
Patent
TLB miss fault handler and method for accessing multiple page tables
Xiaoxin Chen,Alberto J. Munoz +1 more
TL;DR: In this paper, the authors present a virtual memory system that provides concurrent access to translations for virtual addresses from the respective address spaces of both the virtual machine monitor and the VMs.