Open Access
VLSI theory and parallel supercomputing
Charles E. Leiserson
- Vol. 90, pp 15351
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TLDR
In this article, a survey of the major accomplishments of VLSI layout theory and how layout theory engendered the notion of area and volume-universal networks, such as fat-trees, is presented.Abstract:
: Since its inception, VLSI theory has expanded in many fruitful and interesting directions. One major branch is layout theory which studies the efficiency with which graphs can be embedded in the plane according to VLSI design rules. In this survey paper, I review some of the major accomplishments of VLSI layout theory and discuss how layout theory engendered the notion of area and volume-universal networks, such as fat-trees. These scalable networks offer a flexible alternative to the more common hypercube-based networks for inter-connecting the processors of large parallel supercomputers. Keywords: Integrated circuits; Interconnection networks; Parallel computing; Super-computing; Universality; Thompson's model; Tree of meshes.read more
Citations
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Journal ArticleDOI
A CMOS field-programmable analog array
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Dissertation
Design automation and analysis of three-dimensional integrated circuits
TL;DR: This thesis examines precisely how thermal behavior scales in 3-D integration and determines quantitatively how the temperature may be controlled during the circuit placement process and explores two issues for the future of 3- D integration.
Proceedings ArticleDOI
Compact, multilayer layout for butterfly fat-tree
TL;DR: Using a multilayer-wiring VLSI area model, it is shown how a butterfly fat-tree (or fat-pyramid) with N processors can be laid out in Θ(N) active device area using Θ (log(N)) wiring layers.
Programmable arithmetic devices for high speed digital signal processing
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