Patent
Voltage converting circuit and multiphase clock generating circuit used for driving the same
TLDR
A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing as mentioned in this paper.Abstract:
A voltage converting circuit of the charge pump step-up type includes a first circuit means for charging each of first and second capacitors with the voltage of a voltage source at a first timing. A second circuit operates to serially connect the charged first capacitor between a positive electrode of the voltage source and a positive voltage output terminal at a second timing so that a positive voltage which is a double of the voltage source voltage, is supplied from positive voltage output terminal. A third circuit operates to the charged first and second capacitors in series between a ground terminal and a negative voltage output terminal at a third timing so that a negative voltage which is a double of the voltage source voltage, is supplied from the negative voltage output terminal. Since the positive voltage and the negative voltage are generated independently of each other, a voltage variation on one of the positive and negative voltage output terminals caused by an external load causes no voltage variation on the other of the positive and negative voltage output terminals.read more
Citations
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Patent
Charge pump circuit and methods of operation thereof
TL;DR: A charge pump circuit as mentioned in this paper provides a split-rail voltage supply, the circuit having a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of said states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage and centered on the voltage at the common terminal.
Patent
Charge pump circuit
TL;DR: In this paper, an improved charge pump circuit includes one switch element driven by a ramp waveform to precisely control the output voltage and the average resistance of the switch group varies when the voltage of the power source varies, so that an output with a fixed voltage and low ripple voltage can be obtained.
Patent
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Group delay calibration method for power amplifier envelope tracking
Nadim Khlat,Karl F. Horlander +1 more
TL;DR: In this article, an open loop envelope tracking system calibration technique and circuitry is proposed, where an envelope tracker power converter generates a modulated power amplifier supply voltage for the radio frequency power amplifier based on a control signal derived from the modulated signal.
References
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Patent
Integrated dual charge pump power supply and RS-232 transmitter/receiver
David Bingham,Charles M. Allen +1 more
TL;DR: In this paper, a monolithic integrated circuit containing an inverting/non-inverting voltage doubler charge pump circuit is disclosed for converting a unipolar supply voltage to a bipolar supply voltage of a greater magnitude.
Patent
Voltage multiplying and inverting charge pump
TL;DR: In this paper, a charge pump circuit and associated method is provided for outputting either a positive or a negative output voltage, or both, which each may have a predetermined magnitude which is an integer multiple of the magnitude of a power supply voltage used to power the circuit.
Patent
Charge pump circuitry having low saturation voltage and current-limited switch
Robert Essaff,Robert C. Dobkin +1 more
TL;DR: In this paper, a dual emitter transistor switch with low saturation voltage is used to limit the base drive and current-limiting for a charge pump circuit in integrated form, where one emitter acts as a collector when the transistor saturates.
Patent
Two-phase non-overlapping clock generator
TL;DR: In this paper, an external timing source (40) provides an input waveform (44, 46) of signal voltage transitions which occur at a first frequency, which is twice the frequency desired by the internal clock.
Patent
Phase-selectable flip-flop
TL;DR: In this paper, a phase-selectable flip-flop has an input dual-enable transparent latch and an output D-type flipflop, where a clock is input to one enable of the transparent latch, and a command is input in the second enable.