Showing papers on "Block (data storage) published in 1973"

Dynamic storage hierarchy system

Abstract: A data processing system having a main storage-buffer memory hierarchy in which various congruence mapping class configurations are dynamically provided by utilizing a fixed format main storage-buffer array unit. A directory is provided which generates buffer slot addresses in response to the class address portion of a main storage address word. Various block sizes of data may be associatively mapped into predefined areas of a buffer array. A single integrated circuit chip containing both main memory and buffer arrays may be used to implement various congruence classes by the selective application of input signals provided by the main storage address and a hierarchy directory.

Method and apparatus of error detection for variable length words using a polynomial code

Abstract: In the transmission of variable length frames of digital information separated by one or more flag sequences, a block check is generated and appended to the information bits at the transmitter. The block check is generated by Exclusive OR''ing a predetermined non-zero number to the high order information bits and generating (n-k) check digits according to a cyclic error detecting code. The (n-k) check digits are Exclusive OR''d with an (n-k) bit non-zero number to produce the block check. At the receiver, the first mentioned non-zero number is added to the high order information bits and an (n-k) digit number is generated according to the same cyclic error detecting code used at the transmitter. This number is checked to see if it conforms to a predetermined number indicating error-free transmission. Utilizing the above approach, transmission errors in or near the flag sequence are detected, as well as those which may occur in the information field.

Moving block railway signalling

Abstract: An examination is made of the performance of four and five aspect fixed block signalling, theoretical pure moving block signalling, and a more practical quantised moving block system, when operating under both steady state and perturbed running conditions. For each signalling system, a number of basic geographical components, which are commonly found in a railway network, are analysed in order to determine their maximum capacity for a wide range of steady state operating conditions. An example is included of an algorithm which may be used to combine a number of these basic components to facilitate analysis of a more complex configuration. In the investigation of perturbed operating conditions, a specific delay is imposed on a train, and, with a range of running headways, the resulting delays to subsequent trains are evaluated for each signalling system. Thus, it is possible to decide if a signalling system is stable under a given set of operating conditions. Also, if the system is stable, the total number of trains which experience some delay may be determined. Finally, an examination is made of a line which simultaneously carries high speed trains, operating under moving block, and low speed trains, operating under fixed block signalling.

Redundant fast fourier transform data handling computer

Abstract: Special purpose data handling equipment is utilized with a fast Fourier transform algorithm computer. The equipment buffers input data such that each block of input data includes data from the immediately preceding and following data blocks. This input redundancy is useful when input data is processed through a data window which attenuates data at the beginning and end of the data block, since, when this data is transformed and subsequently inversely transformed, simple addition of the output data points removes the effect of the attenuating window.

Parallel Processing Characteristics and Implementation of Data Manipulating Functions.

Abstract: : ITS, ILLIAC 4 COMPUTERSThe report shows that there exists a class of functions, called data manipulating functions, in sequential as well as parallel processors. The circuits used to achieve these functions can be considered to form an independent functional block, called a data manipulator. A basic organization applicable to both sequential and parallel processors is then suggested. The main deviation of a parallel processor organization from the conventional Von Neumann organization is seen to be in the bis (bit-slice) manipulating functions. A comprehensive set of bis manipulating functions (classified in four categories: permuting, replicating, spacing and masking) is given. In addition, it is shown that the data manipulator designs presented in this report are extremely flexible to suit the requirements of various parallel processors. (Modified author abstract)

Limitation of a.c.coupling distortion in magnetic recording

Abstract: This is an apparatus and method for reducing a. c. coupling distortion which is present in a transformer coupled saturated digital magnetic recording system. All data that is to be recorded is partitioned into blocks of specified lengths. Each block of data is then coded so as to be preceded by a prefix bit. The prefix bit takes on a binary value of ''''0'''' or ''''1'''' depending on the number of transition states present in the block of data, the sign of the saturation level at the beginning of the block, and a measure of the accumulated d.c. distortion referred to as the running digital sum. The block data with the associated prefix bit is processed to develop a running digital sum for all data blocks. Selection of a 0 or 1 prefix is based on a test that indicates which prefix bit results in the lowest digital sum.

Program editor for machine control

Abstract: A machine control receives programmed information, as from a perforated programmed tape, for controlling a machine, such as a turning machine. The programmed information includes blocks of machine control information with each block including at least one machine control function word, such as an X displacement command word. The programmed blocks of information are read from the programmed tape and recorded on an auxiliary recording medium, such as a magnetic cassette tape. Facilities are provided whereby an operator may insert a selected number of empty blocks on the auxiliary recording medium interposed between each recorded programmed block. The programmed and empty blocks on the auxiliary recording medium are read and visually displayed for verification and editing purposes. If the operator desires to modify the programmed data or enter new data in an empty block, he selectively operates a manual data entry system for entering the new data. The modified and/or new data is recorded on the auxiliary recording medium in place of the previously recorded data or in the selected empty block. This verified and/or modified information on the recording medium may then be employed as a substitute for the programmed tape for running the machine. Facilities are provided for preparing a new perforated programmed tape from the information on the recording medium.

A user-controlled synchronization method

Abstract: In any system that allows the sharing of facilities between independently-running processes, it is occasionally necessary to 'synchronize' references to shared facilities. A method is presented here that enables any set of processes to achieve such synchronization without any aid from the executive system or special hardware. Only normal load and store operations on two arrays of shared data are required. No overhead is required for unsynchronized operations. And dead-locks are avoided, since it is never necessary to 'block' a process.This method can be viewed as a generalization of Dijkstra's example [D3], though the connection may not be obvious at first glance.

Positioning controlling apparatus

Abstract: In apparatus for controlling the positioning of a moving machine including a plurality of drive axes, there are provided a flip-flop circuit connected to be set by a sampling signal for producing a recording signal, a magnetic memory device responsive to the recording signal for generating a timing signal, a gate circuit connected to be enabled by the recording signal and the timing signal, a timing counter controlled by the gate circuit, a data selector which selects a block commencement code and causes it to be written the magnetic memory device when the count of the timing counter assumes a predetermined value and a plurality of data registers storing data corresponding to respective axes or position information. The timing counter operates to successively select one of the data registers to write the data stored in the selected data register into the magnetic memory device each time the timing counter increases its count. There are also provided a select circuit for selecting the information word of the last axis which is used to construct a word or block of data, and a block length coincidence circuit for identifying the data and comparing the same with the count of the counter in accordance with the selected information word whereby only the information which has been stored in the selected data registers is selectively stored in the magnetic memory device.

An Accelerated Sequential Simplex Search Technique

Abstract: This paper describes an acceleration technique for experimentation by sequential simplex search. A modification of the Spendley, Hext, and Himsworth method, this technique employs a simplex of n + 1 observations in each sequential block of experiments in seeking the optimum for a system involving n independent variables. The objective in applying this technique is to experimentally determine optimum or near-optimum system conditions in a minimum member of sequential experimental blocks. The accelerated technique is shown to achieve near-optimal solutions in one-half to one-third the number of sequential blocks required by the other methods.

Machine log system

Abstract: A typewriter is electronically connected to a multi-page buffer which is a dynamic electronic shift register. System control logic is provided to allow the operator to type codes corresponding to characters as well as certain control codes into the buffer for later print-out. In addition, the system control logic is operable to allow the operator to insert characters into and delete characters from the buffer for editing and correction purposes. The multi-page buffer is also in electronic association with a tape cassette such that the operator, by depressing a page store button, can store the contents of the buffer onto the tape of the tape cassette or read pages from the tape into the buffer. Means are provided for automatically keeping track of the location of the pages of the various jobs. Thus, a machine log is utilized which is recorded at the beginning of the cassette tape which includes the location on tape of each of the pages of a particular job and the next available block which can be utilized for storing a page. Upon depressing the store button to store a page, the machine log is queried and a decision is made to either store the page on an existing block allocated for this job, in which case a command is given to the tape to access that block, or it may be determined that a new block is required for this page. In this case the address of the next available block is determined and is inserted in the machine log static shift register (SSR) and the cassette is automatically driven to that block. At the beginning of a recording operation the machine log stored on the tape is loaded into an electronic static shift register (SSR) under control of the system control logic. Through control of the data flow of the static shift register which holds the machine log, the addresses of the pages associated with a particular job can be stored and deleted to correctly reflect the location of the pages associated with the job. It is the output from the machine log stored in the static shift register which is used to control positioning of the cassette tape to the next available block and the output from the machine log stored in the static shift register is also utilized to update the machine log stored on the tape after completion of a job. Thus, the contents of the machine log stored on the tape, in the event of power failure which would destroy the contents of both the multi-page buffer and the SSR are current up to the last completed job. With the above systems configuration the operator need not be concerned with storage locations on the cassette but instead all storing and reading onto and from the tape is done automatically under control of the systems control logic acting in conjunction with the machine log such that the serial tape is made to perform as a random access store.

A FORTRAN 4 Program for the Inversion of a Large Symmetric Matrix by Block Partitioning

Abstract: : A computer program to invert a large symmetric matrix is described in the report. The given upper triangular portion of a symmetric matrix is partitioned and inverse returned as a result. The minimum region required by the program is 252 K bytes which is still enough to invert a 10000 x 10000 symmetric matrix. If the matrix is not positive definite, a special bordering method (DBINV) is used to invert needed submatrices, otherwise a factorization method (DSINV) is used. The program requires two tape units, one for the input matrix, the other one for the resulting inverse. Four temporary direct access disk units are also needed. The program has been implemented on a IBM 370/165 computer with a maximum user available core of 630 K bytes, not all of which may be needed by the programs described in this report. (Author)