Showing papers on "Canonical Huffman code published in 1983"

Digital data code conversion circuit for variable-word-length data code

Abstract: A digital data code conversion circuit for a variable-word-length data code includes a data code conversion portion and a preparation circuit. In the preparation circuit, a variable-word-length data code having a word length greater than a number n is divided into a plurality of variable-word-length data codes having a word length less than or equal to the number n. The divided variable-word-length data codes are converted into fixed-word-length data codes having a word length n in the data code conversion portion.

Run length code decoder

Abstract: A run length code decoder, constructed to reduce the number of times of memory access to attain a high speed operation, decodes a run length code such as a modified Huffman code in a facsimile machine. It determines a memory address to be read next from a memory which contains a decode table for the run length code by a result of an arithmetic operation of a predetermined address of the memory, a content at the predetermined address and a next data derived from an input code.

Bit Rate Reduction of Digitized Speech Using Entropy Techniques

Abstract: We present the results of a study to reduce the bit rate of speech that has been digitized with a continuously variable slope delta modulator (CVSD) operating at 16, 24, and 32 kbits/s. The theoretical reduction is found from the bit stream entropy. The actual reduction, via Huffman coding, is within 1-2 Percent of the theoretical value. The conditional entropy indicates that additional bit rate reduction can be achieved if we use a set of Huffman codes, conditioned on the past CVSD bits. A third technique, tandem coding, using a maximum likelihood predictor in tandem with run length and Huffman coding, is also investigated. Using these entropy techniques, bit rate reductions of 11-25 percent are achieved for the CVSD rates considered. The paper concludes with a study of the buffer requirements needed to support these entropy coders.

Method and circuit arrangement for transliteration of code words

Abstract: For transliterating code words of a code having m-place code words into the corresponding code words of a different code likewise having m-place code words, individual bits of the code word to be translitereated are forwarded during serial input into a m-place shift register or during the serial output therefrom. These bits are forwarded non-negated or negated from register stage to register stage over a respective forwarding circuit depending upon the measure or criterion of coincidence or non-coincidence between the code word to be transliterated and the code words of the different code. This occurs in such manner that the traversing bits experience a respective negation in front of and after a register stage whose position within the shift register corresponds to the position of non-coinciding bits within the two code words.