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Showing papers on "Decimal published in 1973"


Patent
31 Oct 1973
TL;DR: In this paper, a clock pulse generator feeds clock pulses via Schmidt triggers and logic circuits to a read-only memory which controls the operation of the dividers, and a special decoding circuit operates to convert to a decimal form the output of one of those dividers associated with the decimal switch for the least significant place.
Abstract: A timing or counting system of the purely electronic type which may be used with 50 or 60 Hz-voltages. As a timer, it is regulated by the cycles of the line. It can also time from 10 milliseconds to 11/2 hours. Manually settable digital switches are associated with the present circuit to enable selection of a predetermined decimal count or timing interval. The input line frequency (60 cycles) is doubled, then divided by a number of frequency dividing circuits. A clock pulse generator feeds clock pulses via Schmidt triggers and logic circuits to a read-only memory which controls the operation of the dividers. A special decoding circuit operates to convert to a decimal form the output of one of the dividers associated with the decimal switch for the least significant place.

6 citations


Patent
20 Apr 1973
TL;DR: In this paper, a digital decimal number is converted into a binary number by starting from the most signigicant digit, successively adding the coded digits to the part of the number which has been coded and which is multiplied by 10.
Abstract: A digital decimal number is converted into a binary number by starting from the most signigicant digit, successively adding the coded digits to the part of the number which has been coded and which is multiplied by 10 The multiplication by 10 is effected as an addition of 8x and 2x the already coded part of the number, the multiplications by 8 and 2 being realized as shift operations over three bits and one bit, respectively The addition of the newly added digit is effected by coding it in the bit locations which are vacated by the shift operations, any remaining bit being translated into an input carry

5 citations


Patent
06 Jun 1973
TL;DR: In this article, an improved system for converting binary coded decimal information into synchro signals was proposed, which responds to binary coded signals representing the more significant digits of unknown two-digit decimal numbers.
Abstract: An improved system is provided for converting binary coded decimal information into synchro signals. The system responds to binary coded decimal signals representing the more significant digits of unknown two-digit decimal numbers to obtain coarse values of the corresponding synchro signals, and it also responds to binary coded decimal signals representing the lesser significant digits of the two-digit decimal numbers to interpolate between the coarse values of the synchro signals.

5 citations


Proceedings ArticleDOI
27 Aug 1973
TL;DR: The study is focusing on problems that are due to the structure of numerals in (natural) languages and rule systems (algorithms) that automatically convert mathematical representations into linguistic representations (numerals) or vice versa.
Abstract: Universally used decimal representations, such as 5; 200; 856763; 189200000 are rendered (written, pronounced) differently in different languages. The number 5 is tllus five in English, fern in Swedish, cinq in French, ketsmala in Koyukon, biyar in Hausa and nga: in Burmese. Numbers can furthermore be written differently in different mathematical systems. The number 5 is written V in the Roman system and 101 in a system with base 2 (binary system). We will mainly be interested in the relations between the representations of the decimal system and Swedish numerals. Numerals in some other languages, such as English, German, French, Danish, Burmese, Hausa and Urdu will be touched upon briefly. In particular we are interested in rule systems (algorithms) that automatically convert mathematical representations into linguistic representations (numerals) or vice versa. Our interest in this area is part of a wider interest in Automatic Text Comprehension, 1 which in turn is part of the areas Automatical Language Translation and Artificial Intelligence. The study is focusing on problems that are due to the structure of numerals in (natural) languages. The technical problems that turn up when conversion rules are to be implemented on computer are not treated in this exploratory study. The practical applications of rule systems that convert mathematical representations into numerals or vice versa are automatic devices or robots of various types, e.g. the "automatic stock market announcer ", the "automatic cashier ", the "automatic accountant ", the

4 citations


Patent
11 Sep 1973
TL;DR: A circuit for the parallel conversion from one base to another base, typically decimal numbers to binary numbers and vice versa, comprises a matrix whose lines and columns constitute oriented transmission paths for the numbers expressed to the respective bases and at the crossing points interconnecting logic elements as mentioned in this paper.
Abstract: A circuit for the parallel conversion of numbers expressed in terms of one base to numbers expressed in terms of another base, typically decimal numbers to binary numbers and vice versa comprises a matrix whose lines and columns constitute oriented transmission paths for the numbers expressed to the respective bases and at the crossing points interconnecting logic elements causing the production of new line and column data by multiplication of incoming column data by a modulo b, the incoming line data being regarded as a carry over from a next lower digit value and new line data resulting from the multiplication carry forward modulo b.

2 citations


Book
01 Jan 1973
TL;DR: In this article, the authors present a list of the essentials of algebraic geometry, including quadratic equations, square roots, and rectilinear equations and linear equations.
Abstract: Decimal Fractions.Measurement and Scientific Notation.Common Fractions.Percentage.Essentials of Algebra.Ratio and Proportion.Linear Equations.Exponents and Radicals.Logarithms.Quadratic Equations and Square Roots.Essentials of Plane Geometry.Solid Figures.Trigonometric Figures.Solution of Triangles.Vectors.Radian Measure.Conic Sections.

2 citations


Patent
05 Mar 1973
TL;DR: A numerical data input apparatus stores a numerical data signal supplied by the user in a register with a decimal point fixed at a predetermined place in the register when the input signal is composed of digits all of which can be stored with the position of the decimal-point fixed in the registers as discussed by the authors.
Abstract: A numerical data input apparatus stores a numerical data signal supplied thereto in a register with a decimal-point fixed at a predetermined place in the register when the input signal is composed of digits all of which can be stored with the position of the decimal-point fixed in the register, but the input signal is stored in the register with its decimal-point shifted automatically from the predetermined place in the register when the input signal is composed of digits some of which would cause an overflow or underflow if the decimal point was kept at the predetermined place in the register.

2 citations


Patent
Kuijsten H1
04 Sep 1973
TL;DR: A floating decimal calculator with control for decimal location and correction of falsely-coded sums or differences developed during any of the four basic arithmetic operations, these controls being based on utilization of a fifth bit position at each digit location in the registers of the calculator for these two purposes as mentioned in this paper.
Abstract: A floating decimal calculator with controls for decimal location and for correction of falsely-coded sums or differences developed during any of the four basic arithmetic operations, these controls being based on utilization of a fifth bit position at each digit location in the registers of the calculator for these two purposes.

2 citations



Journal ArticleDOI
09 Dec 1973
TL;DR: This paper presents a design for a fully variable-length structured minicomputer that utilizes a binary-coded decimal number representation.
Abstract: Binary-based and fixed-length structure computers are often inconvenient and wasteful of resources. In this paper we present a design for a fully variable-length structured minicomputer. Since all parameters (instructions and data) are unrestricted in length, their boundaries and interpretation are effected by special delimiter codes. For practical reasons (dictated by current technology) the machine utilizes a binary-coded decimal number representation.

1 citations


01 Jan 1973
TL;DR: The choice of the number of terms in the series expansion is discussed in detail, and the conclusion is that nine terms is a suitable choice on a computer with a floating point accuracy of 7-8 decimal digits.
Abstract: This report describes one algorithm to compute exp(A) and one algorithm to compute both exp(A) and its integral. The method used in the two algorithms is finite series approximation, where the matrix is scaled before the expansion. The choice of the number of terms in the series expansion is discussed in detail, and results of numerical investigations performed on the PDP 15/35 computer are presented. The conclusion is that nine terms is a suitable choice on a computer with a floating point accuracy of 7-8 decimal digits.

Patent
08 May 1973
TL;DR: In this paper, the insertion of a decimal point at a selected location of the decimal readout was controlled by the application of a signal to a selected one of a plurality of selection inputs each corresponding to a respective location.
Abstract: In a system for converting binary data into a decimal readout and in which the bits of a succession of binary words are fed in series into a shift register and fed out therefrom in parallel to control the selection of each decimal digit of the readout, a circuit for controlling the insertion of a decimal point at a selected location of the decimal readout by the application of a signal to a selected one of a plurality of selection inputs each corresponding to a respective location of the decimal readout, the circuit applying an additional shift pulse to the shift register for preventing the storage of a data bit in the shift register location corresponding to the selected decimal readout location and triggering the insertion of a decimal point at the selected readout location.

Proceedings ArticleDOI
04 Jun 1973
TL;DR: In 1790 the United States first considered and rejected a decimal measurement system and subsequently John Quincy Adams conducted an extensive study of the metric system and presented an eloquent discussion supporting its adoption in 1821.
Abstract: In 1790 the United States first considered and rejected a decimal measurement system. Thomas Jefferson presented a decimal system developed around a new "foot" based on a pendulum of such length that a swing from one end of its arc to the other and back would take two seconds. Subsequently, John Quincy Adams conducted an extensive study of the metric system and presented an eloquent discussion supporting its adoption in 1821. In 1866 Congress legalized the use of the metric measurements on an optional basis.

Patent
04 Sep 1973
TL;DR: In this article, a system for reading and recording a decimal numeric and alphabet code of the type in which each decimal digit or letter comprises four stations arranged in first and second pairs of aligned upper and lower stations with segments of different widths in selected ones of the stations.
Abstract: A system for reading and recording a decimal numeric and alphabet code of the type in which each decimal digit or letter comprises four stations arranged in first and second pairs of aligned upper and lower stations with segments of different widths in selected ones of the stations. First and second sensors respectively scan the upper and lower stations of sequential characters generating separate outputs in two channels. Logic circuitry processes the outputs indicating the simultaneous occurrence or non-occurrence of segments in a pair of aligned upper and lower stations, and whether or not the upper segment is wider or not wider than any lower segment. A buffer storage stores such information about a first pair of upper and lower stations and the output from the buffer storage and the output from the logic circuitry for a second pair of aligned upper and lower stations following the first are coupled to a logic matrix to provide a binary output corresponding to the decimal digit or letter. A novel alphanumeric code or font suitable for both visual and machine reading and machine recording and coding is set forth.

Patent
26 Dec 1973
TL;DR: In this paper, a system and method for providing vertical decimal point alignment in columns of textual characters is described, where each level of the column includes a group of characters including a decimal point, and a backspace code is automatically stored in the memory as each of these text codes is stored.
Abstract: A system and method are disclosed for providing vertical decimal point alignment in columns of textual characters wherein each level of the column includes a group of textual characters including a decimal point. This alignment is automatically provided regardless of the number of characters to the left or right of the decimal point in each group. The system includes a keyboard connected to generate codes for input into a recirculating memory. Control circuitry responsive to the keyboard generation of a decimal tab control code causes subsequently entered text codes to be stored in the memory in a contiguous group. A backspace code is automatically stored in the memory as each of these text codes is stored. The backspace codes form a contiguous group that precedes the first of said subsequently entered text codes. A printer connected to the memory backspaces as each backspace code is entered into the memory. A keyboard generated decimal point code is input into the memory as a text code, but no further backspace codes are stored in the memory corresponding to the decimal point code or to text codes entered after the entry of the decimal point code. Upon keyboard generation of a field-end code (such as a carrier return or tab), the character codes, including the decimal point, are printed. A plurality of groups of characters, therefore, may be entered into the memory in this manner to allow vertical alignment of the decimal points.

Journal ArticleDOI
TL;DR: The methods are described for converting binary number to its decimal equivalent in BCD form and from BCD to binary equivalent (integers and fractions) using only two types of basic blocks systematically using only NAND or NOR gates.
Abstract: The methods are described for converting binary number to its decimal equivalent (both integers and fractions) in BCD form; and from BCD to binary equivalent (integers and fractions) using only two types of basic blocks systematically. The logical design of these blocks is also given using only NAND or NOR gates.