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Showing papers on "Degree of parallelism published in 1979"


Proceedings ArticleDOI
01 Jun 1979
TL;DR: In this article, a high degree of parallelism which is not exploited in conventional computer structures has been shown in parallel computer architectures in the last decade in order to make use of this property.
Abstract: Computer users in many areas of scientific study appear to have an almost insatiable desire for processing power. Many of the computations exhibit a high degree of parallelism which is not exploited in conventional computer structures. Considerable interest has been shown in parallel computer architectures in the last decade in order to make use of this property.

35 citations


Book ChapterDOI
08 Oct 1979
TL;DR: Reductions of concurrent systems reduce the degree of parallelism by introducing indivisible sequences of operations, which reduce the complexity of the system as discussed by the authors. If fundamental properties are preserved, this method simplifies analysis and verification.
Abstract: Reductions of concurrent systems reduce the degree of parallelism by introducing indivisible sequences of operations, which reduces the complexity of the system. If fundamental properties are preserved, this method simplifies analysis and verification. Reductions are given for transition systems, place/transition nets and parallel programs.

30 citations


Journal ArticleDOI
TL;DR: A class of parallel programs, based on Free Choice Petri nets, is modeled by associating operators and predicates with vertices of the net, which forms a natural extension of flow-chart notation to parallel programs.
Abstract: A class of parallel programs, based on Free Choice Petri nets, is modeled by associating operators and predicates with vertices of the net. The model, called a formal parallel program (FPP), forms a natural extension of flow-chart notation to parallel programs. Definitions are made of the behaviour of an FPP, and the simulation of one FPP by another. A class of top-down FPPs is next defined, by requiring program graphs to be obtained through successive refinement steps, using a restricted set of control structures. Using the above definitions, it is shown that there exists an FPP ℰ satisfying the property that for any top-down FPP ℰ ′ simulating ℰ, the degree of parallelism attainable in ℰ ′ is smaller than that in ℰ. The measure of parallelism used is the number of different ways of carrying out a computation. In the case of parallel programs, this phenomenon of loss of parallelism therefore uncovers a performance factor which may offset some of the advantages of using top-down design.

3 citations


Journal ArticleDOI
13 Aug 1979
TL;DR: It is shown that in such a system certain “critical nodes” must be given priority of execution when competing with other nodes for the same resources in order to achieve the maximum system throughput and it is suggested that the abstract dataflow model be modified to accommodate such situations.
Abstract: Dataflow languages and processors are currently being extensively studied because they provide for the specification and realization of processes exhibiting a high degree of parallel and/or asynchronous activity [12, 8]. Several researchers have developed simulators for specific candidate dataflow architectures in which there are essentially an infinite number of resources available to the nost machine [9, 1]. This is done to study the degree of parallelism which is achievable with a given version of an algorithm. However, it is an equally important (and neglected) area to study the behavior of programs executing in candidate computer systems having a finite amount of resources. This paper presents results which have been obtained from such modeling. It is shown that in such a system certain “critical nodes” must be given priority of execution when competing with other nodes for the same resources in order to achieve the maximum system throughput. It is suggested that the abstract dataflow model be modified to accommodate such situations. Various design trade-offs associated with the implementation of the simulator are discussed along with a description of available features. A companion paper [6] describes the general dataflow simulation facility which provided the basis of this work.

2 citations