Showing papers on "Fault coverage published in 1968"

Fault Testing and Diagnosis in Combinational Digital Circuits

Abstract: —he problem of designing test schedules for the testing or diagnosis of a small number of nontransient faults in combinational digital circuits (switching networks) is considered in detail. By testing and diagnosis we mean the following: 1) detection of a fault, 2) location of a fault, and 3) location of a fault within the confines of a prescribed package or module. It is shown that minimal test schedules can be readily derived–using procedures already worked out for solving certain problems in pattern recognition and switching theory–under the assumption that the selection of the test inputs in the schedule is independent of the response of the circuit under test. When this assumption is not made, it is shown that much shorter test schedules are sometimes possible, and procedures are offered for obtaining good ones. Finally, the general status of diagnostics for digital circuits is reviewed and evaluated, and specific problems remaining to be solved are described.

Hardware fault detection

Abstract: One of the most pressing problems currently confronting the design automation specialist is that of the automatic generation of component failure detection and diagnostic test sequences. This problem is made more difficult due to the new LSI circuits where we may have hundreds of components on a chip with only a few accessible input/output terminals.