Showing papers on "Latency (audio) published in 1988"

Electronic still camera device

Abstract: An electronic still camera device has a camera unit capable of recording and reproducing video and audio signals, and an audio adapter detachably attached to the camera unit and which has operation switches, a microphone, a collected sound amount indicator and a circuit capable of compressing and expanding audio signals. To reduce the number of signal lines between the camera unit and the audio adapter, the audio adapter is automatically set in the audio playback mode when the audio adapter has detected that compressed audio signals are being delivered from the camera unit to the audio adapter. The camera unit has a power supply arranged to superpose a D.C. voltage of a high level or a low level to the compressed audio signal. A power supply switch provided in the audio adapter is capable of selectively supplying the source power from the camera unit to the audio adapter in accordance with the level of the D.C. voltage. In order to enable the user to conduct sound collection, sound cancelling and sound recording at any desired timing, the audio adapter has switches capable of generating a sound collection starting instruction, a sound collection stopping instruction and a sound cancelling instruction, and operation is executed in accordance with these instructions. A collected sound amount indicator is provided for indicating the amount of collected sound in terms of the sound collection time.

Registered outputs for a memory device

Abstract: Registered output circuitry for a memory device includes a first latch which stores data from a sense amplifier on the rising edge, and outputs it on the falling edge, of the falling edge of an OE signal. This data stored in the latch is provided as output of only y, during the preceding rising edge of the OE signal the CE signal to the memory device was a logical 0 level, and the WE signal was a logical 1 level. Since the falling edge of the OE signal is the beginning of the memory cycle, the data at the output pin of the memory is the data read in the previous read cycle. This latency, however, enables a shortened average cycle time, and also provides registered outputs without the necessity of an external clock signal applied to the memory device.

Apparatus for recording/reproducing a digital audio signal with a video signal

Abstract: A signal processing system for absorbing asynchronism between a video signal and an audio signal which is caused when a PCM audio signal is to be recorded together with the video signal on a helical scan-type tape recorder. When the video signal and the audio signal are recorded on the same track, a recording band width of the audio signal should be narrow. A sample pattern is provided which assures rapid pull-in for both data clock reproduction and carrier reproduction, when the audio signal is modulated by QPSK or when Q-QPSK modulation is used.

Digital audio signal processor

Abstract: A digital signal processing apparatus is provided for identifying the octave, note and cent of a musical sound. The apparatus includes a transducer for converting the musical sound into an electrical signal, a digital detection unit, receiving the electrical signal from the transducer, for determining the octave, note and cent of the material sound by detecting a fundamental frequency of the electrical signal; and a display unit, responsive to the detection unit, for displaying the note as an alphanumeric character and the cent as a positive or negative decimal integral number from -49 to +50 with zero cents representing perfect concert pitch.

Seeking control circuit

Abstract: PURPOSE: To suppress average power consumption for a coil without reducing access performance and to reduce the occurrence ratio of large oscillation in a mechanism by making an actuator execute seeking at speed as low as possible within necessary access time including latency time. CONSTITUTION: A speed control circuit 8 makes an actuator 2, on which a magnetic head 1 is loaded, execute the seeking according to the outputs of a reference speed generating circuit 6 and a feed forward driving signal generating circuit 7, and the speed control circuit 8 adjusts the speed gain of a reference seeking speed profile with a gain adjusting circuits 9a and 9b connected after the reference speed generating circuit 6 and the feed forward driving signal generating circuit 7. Thereafter, an actuator control circuit 5 obtains the necessary access time and makes the actuator execute the seeking at the speed as low as possible within the access time. Thus, the power consumption for a driving coil can be reduced without the lowering of the access performance, and a thermal off track can be suppressed. COPYRIGHT: (C)1989,JPO&Japio

Implementation of digital filters via VLSI array processors

Abstract: This paper describes the implementation of infinite impulse response (IIR) digital filters via VLSI array processors. The IIR digital filter is described by the general state-space model of a multiple-input, multiple-output discrete linear system. The implementation of the associated block parallel state-space model is also described. Finally, the implementation of a single-input, single-output time-varying digital filter is given. The throughput rate and the latency of all the above implementations are considered.

Information recording method

Abstract: PURPOSE:To minimize the latency time at the time of retrieving a bit of information by recording it to a discoid recording medium identical with a CD in shape at a faster speed than a rotating speed in the conventional recording method. CONSTITUTION:A track 2 is recorded with audio data and subcode data at double the linear speed of the CD along the direction of an arrow toward the outer circumference in the same format with the CD, whereas the length of one subcode frame on the disk is double the length of the CD. Therefore, the latency time is 1/2 of the CD. In addition, the discoid recording medium is not only the CD but whatever a discoid recording medium may be if capable of recording at a rotating speed with the number of addresses per rotation as >=2 and =2). Then, the rotating speed is such enough as twofold or more but n-fold or less rotating speed. By this method, the latency time at the time of retrieval can be minimized.

Variable speed reproduction device for time lapse vtr

Abstract: PURPOSE: To attain the recording of audio information and to facilitate the retrieval seeking an object location by providing a means applying time axis compression to the audio signal and using a rotary head so as to form an audio track between video recording tracks. CONSTITUTION: The audio signal IN is subject to time axis compression and the compressed audio signal is recorded between video recording tracks through the rotary head 4 at the halt of a magnetic tape. The operation is repeated for each intermittent feed at a prescribed time interval and the consecutive audio signals are recorded on the audio recording track one after another even with the intermittent feeding. While the magnetic tape is run continuously, it is possible to attain high speed reproduction and the audio signal for the only prescribed value or more of the reproduced signal envelope is fetched once in a semiconductor memory 8 and expanded after the fetch, then the audio signal is restored to the original signal (such as nearly for 1.5sec). While the audio signal is being decoded, the fetch of the audio signal into the memory 8 from the audio track is inhibited. Thus, the audio signal corresponding to the high speed reproduced pattern of the video signal is reproduced for nearly 1.5sec each and the retrieval to seek an object location is facilitated. COPYRIGHT: (C)1989,JPO&Japio

Transmission of digital sound over channels with unforeseen bandwidth limitations

Abstract: A new technique for encoding and decoding digital audio signals offers the advantage of a graceful degradation of the audio performance when the signal is conveyed over channels with a wide range of bandwidths. The flexibility of the new technique also provides a key to the future evolution of the quality of digital audio or video systems within the same digital format. The technique described may well be of particular value in applications involving the storage or broadcast of digital audio signals when the transmitter and receiver are ignorant of the exact bandwidth of the communication system.

The design of an audio signal processor system based on DSP

Abstract: Describes the design of an audio signal processor system using a digital signal processor (DSP). The use of a high speed DSP with 24-bit wide data buses allows the implementation of many digital audio algorithms. These algorithms cover standard audio functions: equalizer, volume and balance control, as well as special functions: reverberations, base width enhancement, adaptive equalizer, dynamic range control, etc. The special audio functions are only available through the use of digital signal processing routines. >