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Showing papers on "Paging published in 1979"


Patent
06 Mar 1979
TL;DR: A distributed microcomputer network is interconnected with a plurality of operator-supervised, numerically controlled (N/C) machines, visual display paging boards, terminal printers and CRT/keyboard terminals for communicating operator-originated CALLs (requests for assistance) to support personnel via the Paging boards and terminal printers, and for sensing and transmitting encoded signals representing the STATUS of each machine to a central control room where the current status of the various machines is displayed on a CRT and where a central data processor compiles periodic reports of the operating history of each
Abstract: A distributed microcomputer network is interconnected with a plurality of operator-supervised, numerically controlled (N/C) machines, visual display paging boards, terminal printers and CRT/keyboard terminals for communicating operator-originated CALLs (requests for assistance) to support personnel via the paging boards and terminal printers, and for sensing and transmitting encoded signals representing the STATUS of each machine to a central control room where the current status of the various machines is displayed on a CRT and where a central data processor compiles periodic reports of the operating history of each machine and stores such reports on a permanent recording. The microcomputer network includes a separate microcomputer for each machine for receiving and concentrating CALL and STATUS data at the individual machine level. These machine microcomputers and their associated machines are divided into separate groups and each group is linked, by a serial transmit/receive data path, to a local microcomputer which further concentrates CALL and STATUS data received from the individual machine microcomputers of the associated group, and which is linked to a visual display microcomputer that controls a paging board assigned to that group of machines. A front end microcomputer, collects the CALLs from all of the local microcomputers and hence their associated display microcomputers for causing all CALLs to be displayed on all of the paging boards located throughout the plant area.

90 citations


Journal ArticleDOI
TL;DR: Using trace driven simulations it is shown that the commonly used assumption, that each request is independently and equally likely to be to any module, is not valid, and this suggests the use of the least-recently used stack model to model program behavior.
Abstract: One of the major factors influencing the performance of an interleaved memory system is the behavior of the request sequence, but this is normally ignored. This paper examines this issue. Using trace driven simulations it is shown that the commonly used assumption, that each request is independently and equally likely to be to any module, is not valid. The duality of memory interference with paging behavior is noted and this suggests the use of the least-recently used stack model to model program behavior. Simulations indicate that this model is reasonably accurate. An accurate, though approximate, expression for the bandwidth is derived based upon this model.

31 citations


Journal ArticleDOI
TL;DR: The procedure TANGENTS accepts as its inputs a point p and a convex polygon P, given as a sequence of vertices beginning with m, which is represented by means of an A VL tree T(P) modified so that each vertex Vi stores a pointer NEXT to the address of its successor Vi+l on the boundary of P.
Abstract: The procedure TANGENTS (P, m, p) accepts as its inputs a point p and a convex polygon P, given as a sequence of vertices beginning with m, also explicitly given. P is represented by means of an A VL tree T(P) modified so that each vertex Vi stores a pointer NEXT[vi] to the address of its successor Vi+l on the boundary of P. This modification is prompted by the following considerations. The \"case classification task\" performed by TANGENTS uses the two vertices m and M; to ensure that this task be completed in constant time, both M (the root) and m (the first member) of T(P) must be available. Thus when either the left or the right subtrees of T(P) are chosen for a recursive call of TANGENTS, their first elements must be also supplied and this is expediently done by means of the pointer NEXT. (An update of NEXT occurs only when a vertex pi is inserted by RESTRUCTURE and it is easily seen that it only involves two pointers, associated with t and pi respectively.) Below, u is a Boolean parameter which is set to 1 in cases 1, 3, 5, 7 (recursive calls of TANGENTS) and is set to 0 otherwise.

17 citations


Patent
Thomas O. Holtey1, Kin C. Yu1
02 Jan 1979
TL;DR: A multiway vectored interrupt as discussed by the authors addresses any one of a plurality of locations in a memory according to a unique function code, which disables the normal paging addressing apparatus of a processor and enables an indirect addressing mechanism when a predetermined location in memory is addressed.
Abstract: A multi-way vectored interrupt automatically addresses any one of a plurality of locations in a memory according to a unique function code. Hardware is provided which disables the normal paging addressing apparatus of a processor and enables an indirect addressing mechanism when a predetermined location in memory is addressed.

14 citations



Journal ArticleDOI
TL;DR: In this article, an analytical model, a simulation model and empirical measurements were used to evaluate the performance of multiprogrammed, paging systems using three tools of performance evaluation: a model for non-exponential arrival times and a comparison between the proposed analytical model and standard models using Poisson arrivals.
Abstract: The behaviour of the paging drum or disc has a significant impact on the performance of multiprogrammed, paging systems. A study is made of such devices using the three tools of performance evaluation: an analytical model, a simulation model and empirical measurements. The models extend previous studies by including non-exponential arrival times and a comparison is made between the proposed analytical model and standard models using Poisson arrivals.

10 citations


Proceedings ArticleDOI
23 Apr 1979
TL;DR: A comparison of the performance of optimally designed computer systems with and without virtual memory is made and the affects of the addition of another I/O device to handle paging and the affect on performance of the additional overhead generated by the page fault handler are demonstrated.
Abstract: In this paper, a comparison of the performance of optimally designed computer systems with and without virtual memory is made. The computer systems in question are modeled by closed queuing networks of the central server type. The design of the systems is formulated as a nonlinear optimization problem where the objective function is to maximize the throughput subject to a nonlinear cost constraint. The decision variables are the speeds of the individual devices. This optimization problem is then solved by use of the Lagrange multiplier technique. The comparisons of the systems demonstrate the affect on performance of the addition of another I/O device to handle paging and the affect on performance of the additional overhead generated by the page fault handler. Also, the optimal amount of money to be spent on main memory is investigated.

9 citations


Proceedings ArticleDOI
27 Mar 1979
TL;DR: The features of the 800MHz High Capacity Automobile Telephone System for public mobile services are described and the system has been developed and is now under construction in Tokyo metropolitan area.
Abstract: The features of the 800MHz High Capacity Automobile Telephone System for public mobile services are described. The system has been developed and is now under construction in Tokyo metropolitan area. Major feature of this system are as follows. 1) High capacity: 100,000 subscribers can be accommodated in the same service area. 2) Efficient utilization of frequency spectrum in the 800MHz band : a) the introduction of small radio zone structure (cellular system) for reuse of the same frequency in radio zones with adequate distance apart by avoiding co-channel interference, b) the increase in the number of channels commonly used by each mobile unit within a radio zone, and, c) the reduction in the occupied bandwidth of radio channels. 3) Fully automatic exchange for a nationwide mobile service. 4)Introduction of various advanced techniques: a) Vehicle location registration technique, by which a switching equipment memorizes the newest location (paging area) of each mobile subscriber. b) Call hand off technique, which enables continuous conversation when a vehicle moves from one radio zone to another during a call. c) Multi-channel access control with two kinds of control channels (paging channel and access channel).

4 citations


Patent
15 Jun 1979
TL;DR: In this paper, the swapping and paging functions are combined to make it possible to perform the processing efficiently by executing the processing between areas segmented by a memory area mapping function in respect to a swapping function and a paging function.
Abstract: PURPOSE:To make it possible to perform the processing efficiently by executing the processing between areas segmented by a memory area mapping function in respect to a swapping function and a paging function. CONSTITUTION:Swapping function 16 is provided which performs the roll-in/roll- out processing between contents of the second working set area on page memory 3 positioned in the CPU side and contents of working set area on page memory 3 positioned in the CPU side and contents of working set roll-out area 24 on external mass storage unit 21. Further, paging function 15 between contents in page unit of the first working set area on unit 3 as well as contents in page unit of the second working area and contents in page unit of the system program storage area on unit 21 as well as contents in page unit of the application program storage area is provided.

3 citations


Patent
19 Jul 1979
TL;DR: In this paper, the memory unit MEM is equipped with the method which makes paging answer numbers from called extension STA to correspond to COTs to be connected through paging answering.
Abstract: PURPOSE:To make it possible to deal at the same time with several incoming calls requiring paging without arranging several paging trunks by making paging answer numbers to correspond to incoming trunks by a PBX. CONSTITUTION:This system is equipped with paging unit PGT discriminaing a number, which corresponds to incoming trunk COT having been connected to attendant board ATT, by an ATT operator and then calling an extension from ATT. Then, memory unit MEM is equipped with the method which makes paging answer numbers from called extension STA to correspond to COTs to be connected through paging answering, thereby connecting STA to COT.

2 citations


Patent
06 Jan 1979
TL;DR: In this article, the paging system is used to reduce the frequency of page faults and decrease the overhead in the virtual memory system applying paging by giving the periodicity to the page to be sent out.
Abstract: PURPOSE:To reduce the occurring frequency for the page fault and thus to decrease the overhead in the virtual memory system applying the paging system, by giving the periodicity to the page to be sent out.

01 Jun 1979
TL;DR: In this paper, the authors present system objectives and design criteria for an in-mine ultralow frequency radio paging system, including coding formats, frequency and bandwidth selection criteria leading to the system design.
Abstract: This report presents system objectives and design criteria for an in-mine ultralow frequency radio paging system. Coding formats, frequency and bandwidth selection criteria leading to the system design are discussed. The prototype call alert transmitter and pocket page receiver is functionally described. The report includes circuit descriptions, schematics, parts lists, printed circuit fabrication, and assembly drawings. The report concludes with an estimate of the manufacturing cost for each assembly.


Journal ArticleDOI
01 Dec 1979
TL;DR: The results are reported for different paging devices, levels of multiprogramming, job mixes, memory allocation scheme, page service scheduling and page replacement rate.
Abstract: This paper reports the results of simulation experiment of a model of a virtual memory computer. The model consists of three major subsystems: Program Behavior, Memory Allocation and Secondary Storage. By adapting existing models of these subsystems an overall model for the computer operation is developed and its performance is tested for various design alternatives. The results are reported for different paging devices, levels of multiprogramming, job mixes, memory allocation scheme, page service scheduling and page replacement rate.

Patent
18 Jun 1979
TL;DR: In this article, the paging control is given in the most preferable form and with every task process with use of a new algorism to supplement the LRU algorisms.
Abstract: PURPOSE:To ensure the modification of the LRU algorism and others for the convenience of the user by indicating the attribute of the page data by the program and also setting the priority according to the task. CONSTITUTION:It is desirable that the paging control is given in the most preferable form and with every task process with use of a new algorism to supplement the LRU algorism. However, it is not preferable to decide such algorism previously. In this connection, attribute field 2 indicating the attribute of data 1 is provided on each page data 1, and the rewriting of the program is made possible for the user (It is the user who uses the data that knows best about the attribute of data 1). At the same time, data attribute indicating region 5, control attribute indicating region 6 and corresponding attribute indicating region 7 are provided to field 2, and the priority can be indicated via thr program between the attributes which are indicated according to the individual task.


Patent
16 Oct 1979
TL;DR: In this article, a call out response system of the telephone exchanger performing paging callout and response, the position link connecting the attendant board 16 with the paging trunk 17 and paging exclusive trunk 22 connected to the Paging exclusive subscriber circuit 21 are provided.
Abstract: PURPOSE:To reduce the burden of operator, by providing the paging exclusive subscriber circuit and the paging exclusive outgoing trunk, and constituting that the direct connection is made when the called party responses without holding the caller on the attendant board, in the paging unit of a telephone exchanger. CONSTITUTION:In the call out response system of the telephone exchanger performing paging callout and response, the position link 15 connecting the attendant board 16 with the paging trunk 17 and the paging exclusive trunk 22 connected to the paging exclusive subscriber circuit 21 are provided. Further, when incoming is present to the office line trunk 14 and the caller requests the paging callout, the operator of the attendant board 16 operates the attendant board 16, starts the speaker 19 of the paging unit via the link 15 to call out the called party, and the called party called out, calls out the number given to the line 21 with the subscriber telephone set 11 at hand, enabling the communication with the direct connection of the office line trunk 14 to the telephone set 11 via the line 21 and the trunk 22.

Patent
11 Jun 1979
TL;DR: In this paper, the address translation apparatus consists of two table look-up mechanisms arranged to maintain a mapping of selected virtual to real address relationships of pages in residence, the first table lookup mechanism having c / n addressable locations of n fields and the second table look up mechanism having a single field addressable location, when c is the maximum number of pages.
Abstract: Data processing apparatus is provided with a paging facility constrained in that the number of pages of any group of pages (defined by a specific bit pattern is a first subset of virtual address bits) in residence inthe direct access data store is limited to n. The address translation apparatus included comprises two table look-up mechanisms arranged to maintain a mapping of selected virtual to real address relationships of pages in residence, the first table look-up mechanism having c / n addressable locations of n fields and the second table look-up mechanism having c single field addressable locations, when c is the maximum number of pages in residence, so that, for a filled direct access data store there is one field in each table look-up mechanism for each page in residence. Both table look-up mechanisms are addressed by the first subset of bits of a virtual address presented for translation and, in addition, the second table look-up mechanism is addressed in response to the operations of the first table look-up mechanism. Either the first or the second table look-up mechanism generates, the real page addresses appropriate to the current mapping. The first table look-up mechanism contains entries each identifying the states of a second subset of virtual address bits of pages of the associated group in residence. The second subset bits of a virtual address presented for translation are compared with all the output fields of the first table look-up mechanism using n compare circuits, outputting to the second table look-up addressing mechanism. The remaining page address bit positions of the presented virtual address are compared with the output of the second table look-up mechanism, the fields of the second table look-up mechanism containing such remaining virtual address bits appropriate to the pages in residence. If either comparator fails to detect an equality a miss is registered and the second table look-up mechanism is only exercised in relation to potential hits.

Proceedings ArticleDOI
06 Nov 1979
TL;DR: This paper investigates algorithms for managing processes and controlling their entry into the multiprogramming set in a virtual memory environment and proposes and evaluates several algorithms for process activation and deactivation.
Abstract: In a Paged Virtual Memory system, scheduling and multi programming control must consider factors such as the page management policy, system resource utilization and page thrashing. This paper investigates algorithms for managing processes and controlling their entry into the multiprogramming set in a virtual memory environment. The algorithms deal with such things as process de activation, reactivation and transitions between different states of a process in order to dynamically control the degree of multiprogramming and system thrashing. Several algorithms are proposed and evaluated for process activation and deactivation. A seemingly better combination of algorithms is determined based upon several system overhead items, CPU utilization, page faults, space-time product utilization, algorithm efficiency and degree of multiprogramming.