Showing papers on "Reconfigurable computing published in 1988"

Reconfigurable hardware for Pseudo-exhaustive test

Abstract: Two pseudo-exhaustive test pattern generator designs are presented, each capable of exhaustively testing a single segment of a circuit. The generators are reconfigurable and easily controlled by a state machine to implement full pseudo-exhaustive test.

A Highly Reconfigurable Array Of Powerful Processors

Abstract: This paper presents a highly reconfigurable architecture for two-dimensional (2D) arrays of powerful processors. Because of its high degree of reconfigurability the architecture can provide fault tolerance with efficient array utilization and support application programs requiring different interconnection structures. The proposed 2D array incorporates a flexible interconnection network using a mechanism called virtual channels. Ideally, the interconnection mechanism of a reconfigurable array would be infinitely reliable and flexible. Our evaluation results, based on the simulation of real programs for an array of Warp processors (a powerful processor developed at Carnegie Mellon and manufactured by GE), show that we can approach this goal with a modestly complex switch design.