Showing papers on "Spy-Bi-Wire published in 1993"
01 Jan 1993
TL;DR: An architecture for JTAG boundary-scan lntedace Controller is presented which is implemented as a basic RTSC microprocessor chip and a JTAG test language, which makes the interface between machine and users very fiiendy is presented.
Abstract: In this paper we present an architecture for JTAG boundary-scan lntedace Controller which we have implemented as a basic RTSC microprocessor chip. We also present a STAG test language which makes the interface between machine and users very fiiendy. is productmg components which supptxt boundary-scan function defined in the standard. JTAG projection can support IC test, board test., IC on board test and system test. So research on hterfbce Controller deslgn which is part of JTAG testabhty design is meamgfhl. In this paper, we present an architecture for JTAG boundary-scan Interface controller. We have implemented it as a besic RISC microprocessor chip. We also present a JTAG test language. We can construct n simple stand-alone test instrument with the chtp and prop memory or assemble them on a board to be used in PC. 2.Architecture
12 citations
16 Nov 1993
TL;DR: An architecture for JTAG boundary-scan interface controller which is implemented as a basic RISC microprocessor chip is presented and a JTAG test language is presented which makes the interface between machine and users very friendly.
Abstract: In this paper we present an architecture for JTAG boundary-scan interface controller which we have implemented as a basic RISC microprocessor chip. We also present a JTAG test language which makes the interface between machine and users very friendly. >
7 citations