Showing papers on "Spy-Bi-Wire published in 2004"

Microprocessor based self-diagnostic port

Abstract: An integrated circuit chip (10) is provided with a JTAG TAP (14), an on-chip JTAG master (16) coupled to the JTAG TAP and a microprocessor interface (20) coupled to the JTAG master. This arrangement permits testing the integrated circuit chip without removing it from a circuit board or taking the circuit board out of service. It allows testing without regard to other chips on the same board. Preferably, the chip also has a conventional JTAG interface which is switchably uncouplable from the JTAG TAP. Figure 1.

Smart card including a jtag test controller

Abstract: An integrated circuit (24) for a smart card (24) may include a transceiver (30) for communicating with a host device (21) and a Joint Test Action Group (JTAG) test controller (28) for performing at least one test operation. Further, the integrated circuit may also include a processor (31) for causing the JTAG test controller (28) to initiate the at least one test operation based upon receiving at least one test request from the host device via the transceiver. More particularly, the processor may convert the at least one test request to JTAG data for the JTAG test controller. That is, the integrated circuit advantageously allows communications between the host device and the JTAG controller via a system bus, for example, without the need for a dedicated JTAG test access port (TAP) which is typically required for accessing JTAG controllers.