Showing papers on "Synchronous Data Flow published in 2009"

Throughput Constraint for Synchronous Data Flow Graphs

Abstract: Stream (data-flow) computing is considered an effective para-digm for parallel programming of high-end multi-core architectures for embedded applications (networking, multimedia, wireless communication). Our work addresses a key step in stream programming for embedded multicores, namely, the efficient mapping of a synchronous data-flow graph (SDFG) onto a multi-core platform subject to a minimum throughput requirement. This problem has been extensively studied in the past, and its complexity has lead researches to develop incomplete algorithms which cannot exclude false negatives. We developed a CP-based complete algorithm based on a new throughput-bounding constraint. The algorithm has been tested on a number of non-trivial SDFG mapping problems with promising results.

Modular static scheduling of synchronous data-flow networks: an efficient symbolic representation

Abstract: This paper addresses the question of producing modular sequential imperative code from synchronous data-flow networks. Precisely, given a system with several input and output flows, how to decompose it into a minimal number of sub-systems executed atomically and statically scheduled without restricting possible feedback loops between input and output?Though this question has been identified by Raymond in the early years of Lustre, it has almost been left aside until the recent work of Lublinerman, Szegedy and Tripakis. The problem is proven to be intractable, in the sense that it belongs to the family of optimization problems where the corresponding decision problem -- there exists a solution with size c -- is NP-complete. Then, the authors derive an iterative algorithm looking for solutions for c = 1, 2, ... where each step is encoded as a SAT problem.Despite the apparent intractability of the problem, our experience is that real programs do not exhibit such a complexity. Based on earlier work by Raymond, this paper presents a new symbolic encoding of the problem in terms of input/output relations. This encoding simplifies the problem, in the sense that it rejects solutions, while keeping all the optimal ones. It allows, in polynomial time, (1) to identify nodes for which several schedules are feasible and thus are possible sources of combinational explosion; (2) to obtain solutions which in some cases are already optimal; (3) otherwise, to get a non trivial lower bound for c to start an iterative combinational search.The solution applies to a large class of block-diagram formalisms based on atomic computations and a delay operator, ranging from synchronous languages such as Lustre or Scade to modeling tools such as Simulink.

Interface-based hierarchy for synchronous data-flow graphs

Abstract: Dataflow has proven to be an attractive computation model for programming digital signal processing (DSP) applications. A restricted version of dataflow, termed synchronous dataflow (SDF), offers strong compile-time predictability properties, but has limited expressive power. In this paper we propose a new type of hierarchy in the SDF domain allowing more expressivity while maintaining its predictability. This new hierarchy semantic is based on interfaces that fix the number of tokens consumed/produced by a hierarchical vertex in a manner that is independent or separate from the specified internal dataflow structure of the encapsulated subsystem. This interface-based hierarchy gives the application designer more flexibility in iterative construction of hierarchical representations, and experimentation with different optimization choices at different levels of the design hierarchy.

A Workbench for Analytical and Simulation Based Design Space Exploration of Software Defined Radios

Abstract: This paper presents a workbench addressing the issue of early design space exploration for Software Defined Radios (SDRs). Key contribution is a pre-simulation mathematical analysis based on Synchronous Data Flow (SDF) graphs, which supports system architects in their soft- and hardware design decisions at early design stages. The analysis is integrated into an Electronic System Level (ESL) based simulation framework allowing a seamless design flow from purely mathematical analysis down to the final implementation of the SDR. In a case study of an exemplary selected physical layer processing the usefullness of the workbench is highlighted.

A graph-based factor screening method for synchronous data flow simulation models

Abstract: This thesis develops a method for identifying important input factors in large system dynamics models from an analysis based on those models’ underlying structures. The identification of important input factors is commonly called factor screening and is a key step in the analysis of simulation models with many input parameters. Models under investigation are system dynamics models implemented as synchronous data flow programs, a model of computation that requires encoding the model components’ dependencies in a graph format. The developed method views this graph as a stochastic process and attempts to rank the importance of inputs, or source nodes, with respect to an output, or non-source node. This ranking is accomplished primarily through the use of weighted random-walks through the graph. A comparison is made against other factor screening techniques, including fractional factorial experiments. The presented structure-based method is found to be comparably accurate to statistical factor screen experiments at magnitude order ranking. Run time of the developed method compared against a resolution III fractional factorial design is found to be similar for small models, and significantly faster for large models.

Real-Time Chain-Structured Synchronous Dataflow: Latency and Data Memory Requirement Formal Determination

Abstract: We consider in this paper a Synchronous DataFlow (SDF) scheduling problem in the context of a multimedia real-time application. A SDF is in our context a chain of non-preemptive processing tasks in charge of the treatment of multimedia data blocks, denoted tokens. SDF has been wildly used in DSP (Digital Signal Processor) design environments over the past ten years. The application relies on Source, Processing and Sink tasks. A Source task produces tokens, Processing tasks process the tokens from the source down to the sink task, and a Sink task consumes the tokens. Source, Processing and Sink tasks are executed in three different processors. As a function of the underlying hardware used to retrieve or store tokens (hard-disk or hardware machine), source and sink tasks can be periodic real-time tasks or not. Each task has an input and an output buffer filled with tokens. This model is typically used in embedded multimedia applications. We propose, in this paper, a solution to optimize both the latency of the application in charge of the treatment of the tokens and the input/output buffers used to store the tokens. We establish a necessary and sufficient condition for the feasibility of a SDF chain. We then validate our results onto a multimedia system simulator of the ST Nomadik® platform.