Showing papers on "System bus published in 1969"

Modular multiprocessor system with recirculating priority

Abstract: A computer having any number of processors of equal capability in the system, each processor being able to scan all peripheral devices over a common bus, with priority resolution being provided by connecting the processors in a closed loop on which is circulated a priority bit. Only the processor receiving the bit can utilize the common bus and circulation of the bit is interrupted by the processor utilizing the common bus.

Interconnection bus system

Abstract: In an interconnection bus system, a first impedance network connects at one end of the bus in parallel with a termination provided by a master unit. The termination includes a load impedance for terminating the bus in its characteristic impedance in series with a voltage source for supplying power to the control circuits of a series of devices tapped at different points along the length of the bus. The last device in the series connects to the other end of the bus and includes a second impedance network, complementary to the first, which terminates the bus to ground.

Digital system for controlling signal transfers between registers and data buses

Abstract: The selective transfer of data signals from selected ones of a plurality of storage registers to selected ones of a separate number of data buses is achieved by storing control signals in control registers associated with each of the storage registers. The control signals indicate the data bus to which the signal contents of the storage register associated with that control register are to be transmitted; and gating circuitry responsive to the control register signals couple the signal contents of the registers to the proper data buses. The communication between registers and buses is maintained until the contents of one of the control registers is changed. Thus, a number of registers may communicate with a number of buses simultaneously; and the contents of a bus may be operated on directly. Circuitry is also disclosed for simultaneously coupling the signal contents of data buses to selected registers.

Direct function data processor

Abstract: A direct function data-processing system employing a number of functional elements all connected to either an input or output data bus or both so as to function as a data source of a data user or both. The system also includes a data transmission link which serves to connect the two data buses so that data can flow only from a data source to a data processor either directly, or by being shifted left or right, or by having one bit added thereto, or by being complemented. A simple control circuit is used to control the operation of the transmission link.

Data bus transfer system

Abstract: The transfer of information in digital form over data busses from one register to another is completed through multiple diode connections between the registers. Switches in the registers are used to change the bias applied via flip-flop circuits to the diodes connected between the registers thereby causing the diodes to become conductive and transfer data from flip-flops in one register to flip-flops in a second register.

Computer Control for the Maryland Cyclotron

Abstract: The isochronous cyclotron at the University of Maryland has been designed to allow computer control of all machine operations in a manner which permits unique operational flexibility. Digital control lines, 16 bits wide, run from various devices in the laboratory to a central multiplexer unit. From there, they are routed to either the operator's console or to a computer data bus. The data bus is attached to a small control computer which will be interfaced to an on-line IBM 360/44, and it will be capable of reading and setting machine controls as well as communicating with the machine operator. The software of the control computer will consist of a highly simplified time sharing system which will coordinate the execution of several independent software modules called 'tasks'. Each task will pertain to a particular control function, and the operating system will 'time share' among several tasks, allowing them to run concurrently. It is intended that this system will greatly simplify normal operations, allowing the operator greater freedom from menial chores.