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Showing papers on "Topology (electrical circuits) published in 1973"


Journal ArticleDOI
TL;DR: Knowing estimates of the maximal length of simple circuits in certain 3-connected planar graphs are surveyed and improved in several directions.

107 citations



Journal ArticleDOI
TL;DR: In this article, improved techniques for the design of broadband linear reflection-type microwave amplifiers using transferred electron devices have been described, which have produced excellent agreement between amplifier design goals and performance.
Abstract: This paper describes improved techniques for the design of broad-band linear reflection-type microwave amplifiers using transferred electron devices. These techniques have produced excellent agreement between amplifier design goals and performance. This agreement results from improvements in measuring techniques and data reduction in addition to the use of a distributed equalizer topology. Multistage amplifiers having a net gain of over 25 dB and a power output in excess of 0.4 W over a bandwidth of 4 GHz in X- band have been realized.

3 citations


Journal ArticleDOI
S. Toida1
TL;DR: An algorithm to find the Hamiltonian circuit in a bipath network is developed and it is shown that the algorithm can be used to test a graph for bipathness.
Abstract: An algorithm to find the Hamiltonian circuit in a bipath network is developed. Using the Hamiltonian circuit all cutsets of a bipath network are generated from incidence sets in a systematic way without duplication. Also it is shown that the algorithm to find the Hamiltonian circuit can be used to test a graph for bipathness.

2 citations


Journal ArticleDOI
TL;DR: A computer-aided synthesis method is described for multi-port RC networks with every capacitor having one terminal grounded and a resistor connected in general between every pair of nodes.
Abstract: A computer-aided synthesis method is described for multi-port RC networks with every capacitor having one terminal grounded and a resistor connected in general between every pair of nodes. The method utilizes an iterative minimization technique for the realization of short-circuit admittance functions. A degree of flexibility in the topology is possible in that certain of the resistors can be eliminated. The synthesis method is particularly suitable for integrated circuits as it yields structures with the minimum value of total capacitance as well as the minimum number of capacitors.

1 citations