Showing papers on "Voltage-controlled oscillator published in 1979"

Frequency Detectors for PLL Acquisition in Timing and Carrier Recovery

Abstract: A significant problem in phase-locked loop (PLL) timing and carrier extraction is the initial acquisition. Very narrow loop bandwidths are generally required to control phase jitter, and acquisition may depend on an extremely accurate initial VCO frequency (VCXO) or sweeping. We describe two simply implemented frequency detectors which, when added to the traditional phase detector, can effect acquisition even with very small loop bandwidths and large initial frequency offsets. The first is the quadricorrelator, previously applied to timing recovery by Bellisio, while the second is new, and called a rotational frequency detector. The latter, while limited to lower frequencies and higher signal-to-noise ratios, is suitable for many applications and can be implemented with simpler circuitry.

Ultrasonic wave oscillator circuit with output meter

Abstract: An oscillation system, having a vibrator, a resonant bridge and a low resistance, oscillates at desirable frequencies by receiving an excitation signal amplified to a predetermined value by an amplifier. A detection feedback signal containing the resonant frequency of the vibrator is input to a phase shift circuit. The phase shift circuit adjusts the phase of the detection feedback signal and the excitation signal to satisfy the oscillation condition. The output signal from the phase shift circuit is input to a PLL comprised of a phase comparator, a low pass filter, an amplifier and a voltage controlled oscillator. The frequency of the output signal from the PLL follows the resonant frequency of the vibrator and is locked. Its output signal is applied to the amplifier which feeds the oscillation system. An analog multiplier circuit is fed with signals proportional to the current and voltage from the resonant bridge circuit, and outputs the product of these signals. The output of the multiplier circuit is rectified and applied to a DC meter for indicating power consumption of the vibrator.

Telemetry means for tissue stimulator system

Abstract: A telemetry system for use in a living tissue stimulator system in which an externally located oscillator is controlled by impedance changes in an impedance reflecting circuit located in an implantable tissue stimulator. In a first embodiment the impedance reflecting circuit is an LC circuit thereby frequency modulating the externally located oscillator and in a second embodiment it is an LR circuit thereby amplitude modulating the externally located oscillator. More specifically, the externally located oscillator drives an LC circuit in which the inductor is positioned in magnetically coupled relationship to an inductor in the impedance reflecting circuit. The externally located oscillator is chosen so that its frequency and amplitude is partially determined by the impedance of the LC circuit and the magnetically coupled impedance reflecting circuit. A parameter or signal to be telemetered, which could be in the form of a digital or an analog signal, is used to modulate an output frequency of a voltage controlled oscillator located in the implantable tissue stimulator. This frequency modulated output of the voltage controlled oscillator drives an FET switch which alters the impedance of the impedance reflecting circuit, thereby modulating the output of the externally located oscillator. Thus, a telemetry system is provided in which minimum power is required from the implantable tissue stimulator.

Automatic pretuning of a voltage controlled oscillator in a frequency synthesizer using successive approximation

Abstract: The automatic pretuning of a voltage controlled oscillator in a phase locked loop frequency synthesizer utilizes a successive approximation technique to rapidly bring the coarse tuning voltage of the oscillator to the desired pretuning value. A digital number stored in a digital register is converted to an analog voltage value and applied to the voltage controlled oscillator as the coarse tuning voltage. The frequency of the output signal from the oscillator is compared with a reference signal, and control logic responsive to the sense of the frequency difference between the reference signal and the oscillator output signal adjusts the value of the number stored in the digital register successively from the most significant bit to the least significant bit. A microprocessor can be used to adjust the value of the number stored in the register, as well as provide additional functions such as reverse successive approximation when the synthesizer is switched from one frequency to another frequency. The microprocessor can also be used to sweep the coarse tuning voltage of the oscillator until the output signal is within the capture range of the phase locked loop, and thereafter perform a successive approximation function to bring the coarse tuning voltage to the center of the capture range.

Apparatus for deriving clock pulses from return-to-zero data pulses

Abstract: A phase-locked loop apparatus for deriving clock pulses from return-to-zero data pulses is disclosed. It includes a phase detector for computing the difference, in time, between that portion of a detected data pulse which occurs before a clock pulse edge and the portion after the clock pulse edge. The difference, once computed, is held for a long period thereafter and is used to drive a voltage controlled oscillator. The voltage controlled oscillator generates the clock pulses which are applied to the phase detector and which comprise the output of the apparatus.

Speed control circuit for phase-locked loop motor drive systems

Abstract: A phase-locked loop motor drive system includes a crystal-controlled frequency source for generating reference frequency pulses at a selectable frequency for driving the motor at a desired speed and a frequency divider coupled to the oscillator to reduce the oscillator frequency to a suitable value as a reference frequency for comparison with the frequency and phase of a signal derived from the motor. In order to provide fine adjustment of the motor speed, a speed control circuit is connected between the oscillator and the frequency divider to inhibit the passage of the oscillator pulses to the frequency divider for a selectable period immediately following an output pulse from the frequency divider when it is desired to decrease the motor speed, and inject a train of higher frequency pulses into the frequency divider while the passage of the oscillator pulses is inhibited when it is desired to increase the motor speed.

Plural frequency oscillator employing multiple fiber-optic delay line

Abstract: Stabilization of an oscillator, particularly an RF oscillator, is achieved by an arrangement employing a fiber optic delay line. The delay line has a Q defined by the relationship Q=2πfτ, where f is the oscillator operation frequency and τ is the length of the delay line. Opto/electronic and electro optic transducers are coupled between the electrical oscillator circuitry and the optical delay line for interfacing the electrical section of the RF oscillator with its optical section. This optic delay line may be configured as a single optical fiber where a single output frequency is desired, or it may be configured of a plurality of optical fibers of respectively different lengths, where plural output frequencies are to be produced.

New canonic sinusoidal oscillator with independent frequency control through a single grounded resistor

Abstract: A novel sinusoidal oscillator is presented which employs only one operational amplifier, two capacitors, and six resistors and has the facility of independent control of oscillation frequency through a single grounded resistor. The circuit may also be used as a very-low-frequency oscillator and as an economical voltage-controlled oscillator.

Phase locked loop system with improved acquisition

Abstract: A phase locked loop system having improved acquisition time is particularly suitable for use in a television receiver with frequency synthesizer tuning. A conventional phase locked loop is modified by the addition of a pair of transmission gates and a frequency discriminator/detector. The transmission gates are normally open, and the phase locked loop system operates in a conventional manner. When a programmable frequency divider connected between the output of the voltage controlled oscillator and the input to the phase locked loop phase comparator has its division ratio changed to select a new channel, the frequency discriminator, which also is connected to the output of the programmable frequency divider, applies an appropriate gating signal to one or the other of the transmission gates to close that gate. The two gates are connected respectively to sources of direct current potential which operate rapidly to force the maximum control signal on the voltage controlled oscillator in the desired direction to produce acquisition until the phase locked loop is nearly locked. When the frequency at the output of the programmable frequency divider comes within a range which is a predetermined amount above or below the desired center frequency of the frequency discriminator, the output of the frequency discriminator terminates, opening the one of the transmission gates which previously was closed to return the system back to operation as a conventional phase locked loop system.

Method and apparatus for modulating a phase locked loop

Abstract: A phase locked loop provides frequency modulation over an extended frequency range by summing a modulation signal with the loop signal at two separate points within the loop. The modulation signal is directly applied to the control input terminal of the voltage controlled oscillator. In addition, the modulation signal is processed to compensate for the transfer functions of loop components, and the processed signal is summed with the loop signal at an additional point between the output terminals of the phase detector and the lowpass filter of the loop. The processing of the modulation signal consists of preshaping of the signal to compensate for the transfer functions of loop circuitry located between the voltage controlled oscillator and the summing junction.

Means and method for maintaining synchronization of a spread spectrum or other receiver clock

Abstract: A system for synchronizing a clock signal generated by a lower stability clock generator to a received incoming signal whereby a higher stability clock generator is synchronized to the lower stability clock generator when the clock signal is synchronized to the incoming signal, and the lower stability clock generator is synchronized to the higher stability clock generator when the incoming signal is lost. More specifically, in a spread spectrum receiver for receiving a signal phase modulated by a pseudo-random code, a means for synchronizing a receiver pseudo-random code generator to the incoming code modulation is provided. The code generator is clocked by a relatively low stability voltage controlled crystal oscillator (VCXO) whose output frequency is controlled by an error signal created by a phase difference between the received code modulation and the output of the pseudo-random code generator. As the low stability VCXO tracks the code modulation, a high stability VCXO is provided to track in frequency and phase the low stability VCXO. If the incoming signal is lost, the high stability VCXO is configured to hold its frequency and phase and to control the frequency and phase of the low stability VCXO, thereby tending to retain the same phase and frequency relationship with respect to the modulation as was present when signal was lost.

Apparatus and method for achieving acquisition and maintaining lock in a phase locked loop

Abstract: A voltage controlled oscillator (VCO) and reference oscillator are connected in a phase locked loop with a first phase detector, loop switch, and acquisition sawtooth sweep circuit. A second phase detector and fast integrator circuit are connected to the VCO and reference oscillator in quadrature relation with respect to the first phase detector. As the acquisition sweep circuit sweeps the VCO, the fast integrator produces a signal whose magnitude increases as the swept VCO frequency approaches the frequency needed for the phase locked loop to achieve phase lock. When this signal magnitude exceeds a predetermined threshold, an output control signal is produced. This output control signal causes the loop switch to close and make the phase locked loop operational. A delay circuit is connected to the second phase detector and fast integrator. The delay circuit produces a delayed output at a predetermined time after the control signal is produced. The delayed output prevents the acquisition sweep circuit from further sweeping after the phase locked loop is operational. The delayed output can also be used to energize other apparatus, such as a radio transmitter. If the phase locked loop includes a mixer or divider which may produce an image or harmonic frequency that could cause erroneous phase lock, a complementary or inverted output can be derived from the second phase detector, and applied to a slow integrator. If the slow integrator output exceeds a predetermined threshold, it opens the loop switch and disables the phase locked loop. This permits the acquisition sweep circuit to operate until the proper frequency is acquired for proper operation by the phase locked loop.

Frequency measuring apparatus

Abstract: An input signal frequency and the output from a local oscillator are applied to a frequency converter to derive therefrom intermediate-frequency signals of frequencies corresponding to the differences between the input signal frequency and the output frequency of the local oscillator and between the former and harmonic frequencies of the latter. The intermediate-frequency signals are amplified by an amplifier, and the output freqeuncy of the amplifier and the oscillation frequency of the local oscillator are simultaneously measured twice. From intermediate frequencies F i1 and F i2 and the local oscillation frequencies F 1 and F 2 thus measured, the following calculation is made: ##EQU1## where α is zero or a decimal. At the same time, it is detected which one of the intermediate frequencies F i1 and F i2 is larger, and from the result of this determination, the above-mentioned N, the local oscillation frequency and the intermediate frequency corresponding thereto, the input signal frequency is calculated.

Phase-locked loop stabilized by a crystal oscillator

Abstract: A phase-locked loop circuit, having an oscillator controlled by a voltage related to the phase difference between a reference signal and a loop signal, is stabilized by a crystal oscillator. The voltage controlled oscillator signal is frequency-subtracted from the crystal oscillator signal frequency to provide an input signal to a frequency-arithmetic synthesizer which provides a loop signal to the phase detector for comparison with the coming reference signal. Use of a frequency-adder circuit between the voltage controlled oscillator and the frequency-subtractor, and receiving an addition frequency derived from the frequency-arithmetic synthesizing circuit, is utilized to decrease the loop gain and provide enhanced characteristics.

Variable speed motor system

Abstract: An electronic system for controlling the speed of a shaded-pole single-phase induction motor provides increased power during speed increase and automatic braking during slowdown by regulation of half-wave D.C. braking current applied to the motor. Speed control during normal operation, and braking control during slowdown and stopping, are implemented by means of dual feedback loops interactively connected to the gate electrode of a triac in the A.C. current line of the motor. The speed control loop utilizes a frequency/phase detector to adjust the time delay of triac gating relative to the zero crossing points of each half-cycle of A.C. voltage until the tachometer-sensed speed of the motor corresponds to a desired speed set by a voltage controlled oscillator. The braking control loop adjusts the time delay of the triac gating relative to the zero crossing points of every alternate half-cycle of A.C. power thus decelerating the motor by an impressed half-wave pulsed D.C. current.

Frequency stabilization circuit for a local oscillator

Abstract: The numbers of cycles in a received signal including Doppler frequency spread are counted (36) modulo a base value much smaller than the number of cycles in such received signal during a predetermined measuring interval for thereby averaging out the effects of such frequency spread in the counter output. That output is utilized to control the frequency of a local oscillator (26) to lock it to the frequency of the received signals. The actual duration of the measuring interval is set (39) in accordance with a signal provided from the oscillator. Also shown are circuits (45, 23) for causing the oscillator initially to lock to a radio system master reference frequency and thereafter to lock, in a narrow frequency band, to a pilot frequency of a specified information channel.

Phase detector for phase locked loops

Abstract: A phase locked loop circuit employing a first edge detector consisting of an exclusive OR gate and flip flop circuit feeding by way of a NAND gate, an up counter and a second edge detector of like kind feeding also by way of a NAND gate into a down counter. Both counters feed into an added which provides a signal to a decoder representing the phase difference between the input phase and the output phase signal. The phase processing system provides positive rapid pull-in over the entire frequency range capability of the VCO, which allows narrow bandwidth loops to track rapid rates of frequency change without loss of lock and with great accuracy.

Method and apparatus for quadriphase-shift-key and linear phase modulation

Abstract: A submultiple (30Fl) of an S-band transmitter output frequency (240Fl) is divided equally between a linear phase modulation branch and a QPSK modulation branch. The linear modulation branch includes a multiplier (X7) to increase the carrier frequency to a level (210Fl) which, when combined with the carrier in the QPSK branch in an up-converter (utilizing a mixer at the input thereof followed by a bandpass filter), produces the transmitter output frequency. This allows the QPSK modulator to operate at one-eighth of the output frequency where repeatable and precisely controlled modulation can be easily achieved. This also allows linear phase modulation at one-eighth the output frequency where low modulator deviation and good linearity can be easily maintained.

Unit time producing system

Abstract: In an electronic timepiece, a system for producing a unit time signal with a high degree of frequency stability, composed of a low frequency oscillator, a high frequency oscillator of a high degree of frequency stability which is activated only during periodic short intervals, and means for producing a timebase signal which is an exact integral submultiple in frequency of the high frequency oscillator signal, by modifying the output signal from the low frequency oscillator on the basis of periodically recurring phase coincidence between the high and low frequency oscillator signals. Information on this phase variation is stored in digital form, and is utilized to correct the low frequency signal during periods when the high frequency oscillator is inactivated.

Frequency control for paralleled AC systems

Abstract: A frequency control utilizing a reference oscillator and a signal controlled oscillator is disclosed. The frequency control maintains the frequency of an output signal at the same frequency as the reference oscillator if there is no signal present at a frequency control input. A signal at the frequency control input causes the frequency of the output signal to be varied accordingly. The frequency control contains a feedback loop which compares the output of the signal controlled oscillator with the fixed frequency of the output of the reference frequency oscillator. The frequency control of the present invention has particular applicability as a frequency control for parallel-connected AC systems.

Battery monitor for digital cardiac pacemaker

Abstract: A programmable cardiac pacemaker pulse generator utilizing digital circuitry for controlling the provision of cardiac stimulating pulses. The pulse generator is capable of having the rate, the pulse width, the pulse amplitude, the refractory period, the sensitivity and the mode of operation programmed. In addition, the pulse generator can have the output inhibited and can respond to programming signals causing a threshold margin test to be performed, effects of closure of the reed switch overridden, a hysteresis function added and a high rate exceeding the normal upper rate limit programmed. Many of the programmable functions of the pulse generator can either be programmed on a permanent or a temporary basis. The pulse generator further includes means for signaling the acceptance of a programming signal, and means to reset the program acceptance circuit if extraneous signals are detected as programming signals. The program signal acceptance circuit performs several different checks on the detected programming signal including a parity check, an access code check and determining if the proper number of signals were transmitted within a given time. The timing circuit of the pulse generator includes a crystal clock oscillator and counter means for counting the clock pulses therefrom to determine the rate of the pacemaker. The pulse width of each pacemaker pulse is determined by using a voltage controlled oscillator in place of the crystal oscillator to obtain energy compensation due to the battery voltage decreasing with time.

Phase synchronous oscillator

Abstract: PURPOSE:To prolong the free-running holding time without varying an output frequency even if an input signal is cut off, by providing a counter, D/A converter, adder, etc. CONSTITUTION:Phase difference detecting counter CNT6, D/A converter 7, adder 9, etc., are provided. Once input signal (a) is cut off, phase comparator 1 outputs a rectangular wave signal with a period twice that of output signal (b). On the other hand, a digital value stored in counter 6 is converted 7 into an analog value, which is applied via AND gate 8 to circuit, where it is added to the output of LPF2. Thus, circuit 9 outputs a voltage obtained by adding a control signal corresponding to a center frequency before voltage control osicllator VCX03 varies in characteristics to a signal corresponding to a stationary phase error after the characteristic change and before a self-scan, and the voltage is applied to oscillator 3 to control its oscillation frequency. Therefore, oscillator 3 is applied with the same voltage as before the free-running start and the oscillation frequency never changes, prolonging greatly the free-running holding time.

Crystal stabilized voltage to frequency converter with digital calibration for flowmeters

Abstract: A voltage controlled oscillator (VCO) system includes a feedback loop for maintaining the linearity, temperature stability and accuracy of the VCO. The feedback loop includes means for producing a fed-back train of pulses having an amplitude equal to a reference voltage and a duty cycle proportional to the ratio of the frequency of the output of the VCO to a reference frequency. The output frequency is thereby made proportional to the input voltage times the ratio of the reference frequency to the reference voltage.

System for transmitter frequency control in coherent ladar

Abstract: A system for ensuring that the transmitted pulse of a coherent ladar is at the correct frequency for coherent detection of received echoes. A hybrid laser transmitter has its continuous mode signal frequency swept through the stabilized frequency of a local oscillator laser. At the instant when the frequency of the transmitter is at a predetermined difference from the frequency of the local oscillator, a high powered output signal is pulsed in the hybrid laser. The resulting reflected, received signals can be mixed with the continuous local oscillator signal in a crystal mixer to produce pulses at the intermediate frequency for amplification and detection. The effect of random variation in frequency of both the local oscillator and hybrid laser is thus avoided.

Phase locked loop carrier recovery circuit with false lock prevention

Abstract: A carrier recovery apparatus for phase modulated waves including phase-locked loops is operable to prevent false locks. The apparatus includes a clock recovery circuit which generates a signal in response to a modulated carrier, a first phase comparator responsive to the modulated carrier and the output of a VCO, a second phase comparator responsive to the first phase comparator and the clock signal, and a control device for superimposing the low frequency component of the output of the second phase comparator on the output of the first phase comparator or a loop filter which controls the VCO.

Frequency modulators with compensation for variations in modulation sensitivity

Abstract: In a frequency modulation system, the frequency modulation sensitivity of an oscillator is itself a function of the carrier frequency of the oscillator. The frequency modulation sensitivity is measured and stored for particular carrier frequencies, and subsequently used to control the amplitude of the modulation signal, so that when a frequency modulation signal is fed to the oscillator, a frequency deviation is obtained which is accurately related to the amplitude of the modulation signal.

Charged coupled device time base corrector system

Abstract: An improved charged coupled device time base corrector system to compensate for a change in the phase or frequency of input video signals, as occurs in the playback of a video tape recorder, by changing the nominal delay through the corrector, comprising, in combination, an input feedback circuit and an output feedback circuit. The input feedback circuit includes two cascaded infinite gain circuits, an infinite gain phase detector followed by an infinite gain voltage amplifier which gives an error voltage that controls the frequency of the voltage controlled oscillator (VCO) utilized to control the system delay. The output servo loop always adapts itself to the input error voltage. The VCO is thereby driven at a rate of change of its frequency proportional to the incoming error signal. .

Multifrequency control from a single crystal

Abstract: A piezo-electric crystal vibrating in several modes controls several frequencies generated by voltage controlled oscillators simultaneously. The output of each voltage controlled oscillator is fed to a summing amplifier which drives the crystal. The output of the crystal is fed to individual phase detectors; each phase detector is also supplied with the output of a voltage controlled oscillator and generates a voltage proportional to the phase difference between the voltage controlled oscillator and the crystal output for correcting the output frequency of each oscillator.

Frequency synthesizer incorporating digital frequency translator

Abstract: The use of a digital frequency translator, using pulse snatching techniques, for multiplying the output frequency of a precise and accurate frequency synthesizer by a preselected certain numerical fraction permits the frequency synthesizer to be referred to a molecular clock with only a single VCXO phase lock loop.

Frequency adjusting methods and systems

Abstract: A frequency synthesizing arrangement is disclosed employing a phase-locked loop. The phase detector of the phase-locked loop receives an input frequency via a divider having a division factor N, and compares this divided frequency with the frequency received from a voltage controlled oscillator via a divider having a division factor N-b. Any difference is eliminated by the control signal from the phase detector which is connected to adjust the VCO frequency. Therefore, the phase-locked loop multiplies the divided input frequency by the factor (N-b). By making b very much smaller than N, the minimum step change in output frequency is approximately F.b/N 2 (where F is the input frequency to the divider). In this way, the minimum step change in frequency can be made very small.