Showing papers on "Wait-for graph published in 1987"

Deadlock detection in distributed databases

Abstract: The problem of deadlock detection in distributed systems has undergone extensive study. An important application relates to distributed database systems. A uniform model in which published algorithms can be cast is given, and the fundamental principles on which distributed deadlock detection schemes are based are presented. These principles represent mechanisms for developing distributed algorithms in general and deadlock detection schemes in particular. In addition, a hierarchy of deadlock models is presented; each model is characterized by the restrictions that are imposed upon the form resource requests can assume. The hierarchy includes the well-known models of resource and communication deadlock. Algorithms are classified according to both the underlying principles and the generality of resource requests they permit. A number of algorithms are discussed in detail, and their complexity in terms of the number of messages employed is compared. The point is made that correctness proofs for such algorithms using operational arguments are cumbersome and error prone and, therefore, that only completely formal proofs are sufficient for demonstrating correctness.

Thoth-II: hypertext with explicit semantics

Abstract: This paper describes a hypertext system — Thoth-II. This system provides a rich means for modeling semantic interconnections among texts. It allows a user to browse texts, exploring their relations with other texts. These relations are modeled by a directed graph. The texts are embedded in the graph. Connections among specified phrases in the text and the graph structure are automatically formed. In the browsing mode the user is presented with an interactive graphic display of the directed graph. In the text mode the user can use multiple windows to display and interact with the stored text.

Graph Homomorphisms and the Design of Secure Computer Systems

Abstract: In designing and analyzing the structure and security of a large scale computer program or system, one is often interested in how it is constructed out of pieces or in the flow of information through it. The concepts of dependency, connectivity, and reparability which arise in security verification are handled well by graph theory. As is shown in this paper, graph homomorphism are particularly useful for describing the hierarchical/modular design of a system and for demonstrating the security of information flow.

Graph Reduction: Proceedings of a Workshop Santa Fe, New Mexico, USA, September 29 - October 1, 1986

Abstract: On the correspondence of lambda style reduction and combinator style reduction.- Head order reduction: A graph reduction scheme for the operational lambda calculus.- A simple abstract machine to execute supercombinators.- Concurrent term rewriting as a model of computation.- Alfalfa: Distributed graph reduction on a hypercube multiprocessor.- Parallel graph reduction on a supercomputer: A status report.- Target code generation from G-machine code.- Toward the design of a parallel graph reduction machine the MaRS project.- The parallel graph reduction machine, ALICE.- Overview of Rediflow II development.- Specification of reduction strategies in term rewriting systems.- Controlling reduction partial order in functional parallel programs.- Parallel garbage collection for graph machines.- Graph reduction in a parallel virtual memory environment.- Performance measurement of a G-machine implementation.- A flexible architectural study methodology.- Arrays, non-determinism, side-effects, and parallelism: A functional perspective.- A new array operation.- I-Structures: Data structures for parallel computing.- Parallel execution of an equational language.- Implementing logical variables on a graph reduction architecture.- Functional logic languages part I.- Unification of quantified terms.

Directed Graph Optical Processor

Abstract: A directed graph processor and several optical realizations of its input symbolic feature vectors and the multi-processor operations required per node are given. This directed graph processor has advantages over tree and other hierarchical processors because of its large number of interconnections and its ability to adaptively add new nodes and restructure the graph. The use of the basic concepts of such a directed graph processor offer significant impact on: associative, symbolic, inference, feature space and correlation-based AI processors, as well as on knowledge base organization and procedural knowledge control of AI processors. Initial iconic alphanumeric data base results presented are most promising.

SandKASt (Sandia Knowledge Acquisition System): An automated knowledge acquisition system

Abstract: SandKASt (Sandia Knowledge Acquisition System) is a knowledge acquisition system that allows the expert to directly build a knowledge base. It is based on a graph formalism that delineates the problem structure and dependencies of the heuristics and highlights in consistencies or omissions in the knowledge base. The graph formalism evolved through our experience in developing a rule-based system for fault diagnosis of electronic components in a large system. In SandKASt, the knowledge base is displayed as a directed acyclic graph. In this graph, a node represents a state of the troubleshooting session, or context, with an associated set of possible faults. An arc represents a test to be applied in the context of the source node. The graph can be expanded depth-first, breadth-first or by adding a single node. Graph pruning and information retrieval can be performed at any time during the knowledge acquisition session. With the development of SandKASt, we sought to involve the expert directly in the system development and maintenance. We find that SandKASt allows more efficient and productive knowledge acquisition sessions. The graph structure provides a formalism for viewing the knowledge acquisition process and allows efficient storage of the diagnostic heuristics without redundancy.

A Distributed Deadlock Avoidance Technique

Abstract: A deadlock avoidance technique, based on a new way of representing directed acyclic graphs, is presented. We use a path matrix representation making it possible to detect cycles efficiently when attempting to insert edges. This representation also gives an obvious splitting of the global resource allocation graph in a distributed system. The low cost of the cycle detection can amortize the cost of the other operations and linear (or even constant) time for one operation can be attained. The number of sent messages can also be amortized depending on the speed of the message traffic. With sufficiently high speed an amortized constant number of sent messages per operation can be attained.