A baseplate for a flat panel display comprising relatively thick semiconductor substrate, wherein the semiconductor substrate is a macro-grain polycrystalline substrate, which is amorphized by ion implantation or reformed by recrystallization, to obscure the grain boundaries, thereafter redundant circuitry may be fabricated thereon to further enhance product yield.

Field emission structures produced on macro-grain polysilicon substrates

A process for forming large-grain polycrystalline films from amorphous films for use as photovoltaic devices. The process operates on the amorphous film and uses the driving force inherent to the transition from the amorphous state to the crystalline state as the force which drives the grain growth process. The resultant polycrystalline film is characterized by a grain size that is greater than the thickness of the film. A thin amorphous film is deposited on a substrate. The formation of a plurality of crystalline embryos is induced in the amorphous film at predetermined spaced apart locations and nucleation is inhibited elsewhere in the film. The crystalline embryos are caused to grow in the amorphous film, without further nucleation occurring in the film, until the growth of the embryos is halted by imgingement on adjacently growing embryos. The process is applicable to both batch and continuous processing techniques. In either type of process, the thin amorphous film is sequentially doped with p and n type dopants. Doping is effected either before or after the formation and growth of the crystalline embryos in the amorphous film, or during a continuously proceeding crystallization step.

Polycrystalline semiconductor processing

The structure of second and third order twin boundaries in silicon

A process for the preparation of a semiconductor device in a thin film of a monocrystalline semiconductor material supported on the surface of a substrate. In the process a thin film of a monocrystalline semiconductor material is formed on a substrate. The film of monocrystalline semiconductor material is doped at various depths with various types and concentrations of dopants. Thereafter, contacts are established at various depths of the doped thin film. In one embodiment, a thin film of a non-monocrystalline semiconductor material is deposited on a substrate. The thin film of non-monocrystalline semiconductor material is doped in situ as it is being deposited with various doping impurities to provide various types and concentrations of doping impurities at various depths. The thin film of non-monocrystalline semiconductor material has at least one tapered region terminating in a point. The thin film of non-monocrystalline semiconductor material is traversed with a particle beam. The traverse is initiated at the point causing nucleation of a crystal at the point and subsequent growth of a monocrystalline thin film of semiconductor material from the point during the traverse. Contacts are then established at various depths to provide a semiconductor device, such as a bipolar transistor.

Thin film semiconductor device and method for manufacture

The Flat-Plate Solar Array (FSA) Project, funded by the U.S. Government and managed by the Jet Propulsion Laboratory, was formed in 1975 to develop the module/array technology needed to attain widespread terrestrial use of photovoltaics by 1985. To accomplish this, the FSA Project established and managed an Industry, University, and Federal Government Team to perform the needed research and development. 

The primary objective of the Silicon Sheet Task of the FSA Project was the development of one or more low-cost technologies for producing silicon sheet suitable for processing into cost-eompetitive solar cells. Silicon sheet refers to high-purity crystalline silicon of size and thickness for fabrication into solar cells. 

The Task effort began with state-of-the-art sheet technologies and then solicited and supported any new silicon sheet alternatives that had the potential to achieve the Project goals. 

A total of 48 contracts were awarded that covered work in the areas of ingot growth and casting, wafering, ribbon growth, other sheet technologies, and programs of supportive research. Periodic reviews of each sheet technology were held, assessing the technical progress and the long-range potential. Technologies that failed to achieve their promise, or seemed to have lower probabilities for success in comparison with others, were dropped. A series of workshops was initiated to assess the state of the art, to provide insights into problems remaining to be addressed, and to support technology transfer. 

The Task made and fostered significant improvements in silicon sheet including processing of both ingot and ribbon technologies. An additional important outcome was the vastly improved understanding of the characteristics associated with high-quality sheet, and the control of the parameters required for higher efficiency solar cells. Although significant sheet cost reductions were made, the technology advancements required to meet the Task cost goals were not achieved. 

This FSA Final Report (JPL Publication 86-31, 5101-289, DOE/JPL 1012-125, October 1986) is composed of eight volumes, consisting of an Executive Summary and seven technology reports:
Volume I: Executive Summary.
Volume II: Silicon Material.
Volume III: Silicon Sheet: Wafers and Ribbons
Volume IV: High-Efficiency Solar Celis.
Volume V: Process Development.
Volume VI: Engineering Sciences and Reliability.
Volume VII: Module Encapsulation.
Volume VIII: Project Analysis and Integration.
Two supplemental reports included in the final report package are:
FSA Project: 10 Years of Progress, JPL Document 400-279. 5101-279, October 1985.
Summary of FSA Project Documentation: Abstracts of Published Documents, 1975 to 1986, JPL Publication 82-79 (Revision 1),5101-221, DOE/JPL-1 012-76, September 1986.

Electricity from photovoltaic solar cells: Flat-Plate Solar Array Project final Report. Volume III: Silicon sheet: wafers and ribbons

Recent advances in ribbon-to-ribbon crystal growth

The current state of development of the RTR process for silicon ribbon growth is reviewed. Present growth capabilities, material characterization, and device performance are summarized. Specific process problems, such as poor laser coupling efficiencies, are discussed and approaches to their solution are described. Problems related to thermal stresses are discussed in some detail. Stress induced birefringence measurements are used to evaluate residual stresses. A linear temperature profile postheater is effective for reduction of residual stresses. A correlation may be obtained between minority carrier diffusion lengths, dislocation densities, and thermal stress levels.

Silicon ribbon growth via the ribbon-to-ribbon (RTR) technique: Process update and material characterization

A polycrystalline semiconductor sheet may be converted to a monocrystalline or macrocrystalline semiconductor sheet through use of a geometric restriction in the sheet. The process requires formation of a region of the sheet having a small width compared to the width of the remainder of the sheet. A molten zone is formed in the small width region of the sheet. At least a portion of the molten zone is allowed to solidify into a single crystal or crystals of large size of the semiconductor material coextensive with the small width of the region at the portion of the molten zone so solidified. The molten zone is then moved from the small width region of the sheet into the remainder of the sheet. The sheet is allowed to solidify successively as the molten zone passes along it. As a result, the macrocrystal formed in the narrow width region of the sheet propagates into the remainder of the sheet through which the molten zone passes. This process allows formation of high modified semiconductor material without requiring use of a seed crystal.

Self-seeding conversion of polycrystalline silicon sheets to macrocrystalline by zone melting

A method of producing a sheet of semiconductor material directly usable for the production of solar cells is disclosed. The method comprises establishing a molten region at an edge of a sheet of semiconductor material, moving the molten region across the sheet to create a path of elongated crystal grains, establishing a molten zone along a portion of the path of the elongated crystal grains and parallel thereto, and causing the molten zone to travel in a direction transverse to the path of elongated crystal grains.

Crossed grain growth

The crystal structure of a semiconductor layer is modified. A heat source melts a zone of the layer in an atmos. contg. O2, while the layer moves w.r.t. the heat source. The zone then solidifies when it is moved away from the heat source, to produce an improved crystal structure. The layer is pref. polycrystalline Si, travelling vertically in air past a defocussed laser beam which produces monocrystalline Si, esp. by continuous melting and solidification of a zone in an atmos. contg. min. 4 vol.% of an oxidising gas, esp. air, or an atmos. contg. 10-30 vol,% O2. Exceptionally large quantities of silicon strip can be reliably produced at very low cost, and used e.g. for converting solar energy into electricity.

A. Baghdadi

Papers

Recent advances in ribbon-to-ribbon crystal growth

Silicon ribbon growth via the ribbon-to-ribbon (RTR) technique: Process update and material characterization

Self-seeding conversion of polycrystalline silicon sheets to macrocrystalline by zone melting

Crossed grain growth

Monocrystalline silicon strip for solar cells - mass produced by continuous laser melting of moving polycrystalline strip