Charge-coupled devices (CCDs) have been fabricated on high-resistivity, n-type silicon. The resistivity, on the order of 10 000 /spl Omega//spl middot/cm, allows for depletion depths of several hundred micrometers. Fully depleted, back-illuminated operation is achieved by the application of a bias voltage to an ohmic contact on the wafer back side consisting of a thin in situ doped polycrystalline silicon layer capped by indium tin oxide and silicon dioxide. This thin contact allows for a good short-wavelength response, while the relatively large depleted thickness results in a good near-infrared response.

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Fully depleted, back-illuminated charge-coupled devices fabricated on high-resistivity silicon

Modern civilization is related to the increased use of electric energy for industry production, human mobility, and comfortable living. Highly efficient and reliable power electronic systems, which convert and process electric energy from one form to the other, are critical for smart grid and renewable energy systems. The power semiconductor device, as the cornerstone technology in a power electronics system, plays a pivotal role in determining the system efficiency, size, and cost. Starting from the invention and commercialization of silicon bipolar junction transistor 60 years ago, a whole array of silicon power semiconductor devices have been developed and commercialized. These devices enable power electronics systems to reach ultrahigh efficiency and high-power capacity needed for various smart grid and renewable energy system applications such as photovoltaic (PV), wind, energy storage, electric vehicle (EV), flexible ac transmission system (FACTS), and high voltage dc (HVDC) transmission. In the last two decades, newer generations of power semiconductor devices based on wide bandgap (WBG) materials, such as SiC and GaN, were developed and commercialized further pushing the boundary of power semiconductor devices to higher voltages, higher frequencies, and higher temperatures. This paper reviews some of the major power semiconductor devices technologies and their potential impacts and roadmaps.

Power Semiconductor Devices for Smart Grid and Renewable Energy Systems

The most commonly used high-voltage blocking and termination structures-floating field limiting rings (FLR), lateral charge control HVIC devices, and junction termination extension (JTE) structures-are very sensitive to positive silicon and silicon dioxide interface charges. These high-voltage termination structures specifically designed for 1000-V blocking capability lose 25 to 50% of their voltage-blocking capability under 5*10/sup 11/ cm/sup -2/ net interface state density. In contrast, optimized multiple-zone JTE (MZ-JTE), and offset multiple field plated and field-limiting ring (OFP-FLR) structures will lose only 5% of their respective voltage blocking capabilities under the same surface-charge condition. These improved high-voltage blocking structures do not require additional passivation and process complexities. >

Optimization and surface charge sensitivity of high-voltage blocking structures with shallow junctions

An optimized multiple floating guard ring structure is investigated for the first time as an edge termination method for high voltage 4H-SiC planar devices. Simulations were performed to investigate SiC guard ring termination, and determine the optimum guard ring spacing for planar diodes with up to four floating rings. Simulated optimized designs predicted breakdown values from 40% of the ideal breakdown with a single ring, to 84% of the ideal value for diodes with four rings. Implanted 4H-SiC pn diodes with optimized guard ring designs were fabricated and results correlated to simulation. Experimental breakdown values of 1.2–1.3 kV for guard ring structure with four rings were in good agreement with simulated results.

Design and fabrication of planar guard ring termination for high-voltage SiC diodes

Extremely high breakdown voltages with very low leakage current have been achieved in plane and planar p-n junctions by using an ion-implanted junction extension for precise control of the depletion region charge in the junction termination. A theory is presented that shows a greatly improved control of both the peak surface and bulk electric fields in reverse biased p-n junctions. Experimental results show breakdown voltages greater than 95 percent of the ideal breakdown voltage with lower leakage currents than corresponding unimplanted devices. As an example, plane-junction moat-etch-terminated diodes with a normal breakdown voltage of 1050 V and a 0.5-mA leakage current become 1400 V (1450 ideal) devices with a 5-µA leakage current. Planar junctions, which broke down at 300 V, blocked as much as 1400 V if JTE terminated. Since planar junctions are of the greatest interest, we incorporated multiple field ring, field plate, and JTE terminations on a mask set and fabricated and tested thousands of devices. The results clearly showed that the ideal breakdown voltage can be achieved with less than 200 µm with JTE, where the same area would lead to 30 to 45 percent of the ideal with field rings and up to 40 to 50 percent of the ideal when used with field rings combined with field plates. Eight rings, even combined with a field plate, yielded less than 80 percent of the ideal breakdown voltage and required about 400 µm of device periphery.

Junction termination extension for near-ideal breakdown voltage in p-n junctions

The use of one or more floating field limiting rings reduces the adverse effect of junction curvature on the breakdown voltage in planar devices. Although this has been known for some time, there has not been a way of accurately predicting the amount of improvement that can be achieved using field rings. In this paper, a computer algorithm is presented which makes it possible to perform field calculations on devices with floating field rings. In addition, a normalized curve is presented which shows the relative improvement that a single optimally placed field ring has on the breakdown voltage for any planar device. The basis of the construction of this curve is the use of a normalized radius of curvature which is a precise measure of the effect of curvature for any device. The theoretical predictions are compared with experiments for over 640 devices encompassing 16 different field ring locations. Good agreement is achieved between theory and experiment.

Theory and breakdown voltage for planar devices with a single field limiting ring

The bilateral switch is a new semiconductor device which abruptly lowers its impedance as a result of the application of a voltage of sufficient amplitude. The switch is used for pulse generation, and more specifically for the precise firing of Triacs and silicon controlled rectifiers. The switch is in the form of a monolithic circuit of the planar passivated type. The tested device has a switching voltage of 6.4 V at 25°C, and the temperature coefficient is less than 0.05 percent/°C. The dc forward current is 200 mA, the peak forward current is 1 A, based on a 10-µs pulsewidth, 1-percent duty cycle, and an ambient temperature of 100°C. The paper describes the principle of operation, the basic design, and shows test data.

A.P. Ferro

Papers

Theory and breakdown voltage for planar devices with a single field limiting ring

A bilateral silicon switch