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Ahmed Salem
Researcher at University of Agder
Publications - 21
Citations - 383
Ahmed Salem is an academic researcher from University of Agder. The author has contributed to research in topics: Topology (electrical circuits) & Field-programmable gate array. The author has an hindex of 8, co-authored 21 publications receiving 225 citations. Previous affiliations of Ahmed Salem include Aswan University.
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Voltage Source Multilevel Inverters With Reduced Device Count: Topological Review and Novel Comparative Factors
TL;DR: This article updates and summarizes the recently developed multilevel topologies with a reduced component count, based on their advantages, disadvantages, construction, and specific applications, and proposes a comparative method with novel factors to take component ratings into account.
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New Three-Phase Symmetrical Multilevel Voltage Source Inverter
TL;DR: A significant factor (FC/L) is proposed, which is developed to define the number of the required components per pole voltage level and a detailed comparison based on FC/L is provided in order to categorize the different topologies of the MLIs addressed in the literature.
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Study and Analysis of New Three-Phase Modular Multilevel Inverter
TL;DR: The proposed MMLI inverter consists of repeated modular primary cells that are connected in series configuration and can be extended to get more output voltage levels by adding additional cells without increasing voltage stresses across power switches.
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Novel Three-Phase Multilevel Inverter With Reduced Components for Low- and High-Voltage Applications
TL;DR: A novel multilevel topology for three-phase applications, having three-level and hybrid N-level modular configurations, enabling low-, medium-, and high-voltage operations, is presented, and the key features of the proposed topology in terms of component count, blocking voltage, and dc-link requirements are highlighted via a comparative study.
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Field Programmable Gate Array -Based System-on-Chip for Real-Time Power Process Control
TL;DR: Flexible solution using software control algorithms coupled with an embedded RT kernel on powerful embedded processor cores, combined with reconfigurable logic and dedicated resources on the Field Programmable Gate Array (FPGA).