안테나 이론과 해석 ( Antenna Theory & Analysis )

This paper proposes an Ultra-Wide Band antenna with multiple bands for satellite and radar communications. A miniaturized meander antenna is proposed, and its design is presented and simulated. The design incorporates a flower type patch antenna and a half planar ground surface using metamaterial. The antenna has a substrate size of 20mm x 20mm with a total thickness of 1.588 mm. By using FR4 epoxy as substrate, antenna resonates at 10.77GHz and 19.00GHz. This paper addresses a simple design methodology for the multiband microstrip patch antenna by using meander lines. This paper also shows the effects on the use of meander lines on the patch antenna. The antenna, so designed suggests a unique structure in which slot is used to propagates multiband frequencies. In this technique, a rectangular MPA is designed, then circular slot is imposed on top of the radiating patch. The results such as return loss, surface charge density, radiation pattern is obtained and discussed. The antenna is simulated on HFSS and results like gain, VSWR, radiation efficiency and radiation pattern are investigated. 

A Simple Miniaturized Flower Patch Antenna using Meander Lines for X &amp; K Bands

The floating-point (FP) four-dimensional vector inner product (4D dot product; DP4) is one of the most frequently performed operations in 3D graphics applications. Therefore, the hardware implementation of FP DP4 unit can be used in modern graphics processing units (GPUs) to speed up the performance. Unfortunately, the FP DP4 unit is power hungry and how to reduce its power consumption becomes very critical for the mobile GPUs. In this paper, a multi-functional multi-precision DP4 unit with single instruction multiple data (SIMD) architecture is proposed. Instead of additional discrete FP multipliers, adders, and multiply-add-fused units, the proposed architecture can perform not only one-way DP4 but also four-way multiplication, addition, and multiply-add-fused operations to decrease the hardware area. In addition, the proposed architecture can perform the above-mentioned FP operations with four precision modes (i.e., 23-, 18-, 13- and 7-bit modes) to reduce the power and energy consumptions when a little image distortion is allowable. The proposed design is fully pipelined with a latency of three cycles, a throughput of one cycle, and a cycle time of 2.8 ns in 90 nm CMOS technology. When compared with the one-precision DP4 unit, the proposed multi-precision DP4 unit can save about 7.2, 18.5, 32.2, and 49.6 % power consumption on average for 23-, 18-, 13- and 7-bit precision modes, respectively, at the expense of 3.7 % more area and 7.7 % longer delay.

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A Multi-functional Multi-precision 4D Dot Product Unit with SIMD Architecture

Arithmetic operations in digital systems forms an important part of study in recent years. Floating point (FP) implementation on the reconfigurable hardware architecture is an important area of concern. Many fresh designs have been advanced recently and segregate with existing approaches on the basis of various performance parameters. In given paper a review of the FP units design is discussed for arithmetic operations in manner of addition, multiplication, division and subtraction. Also units having multi operands are also reviewed in this work which utilizes both distributed and fused concept.

Literature Review Based On Fused Floating Point Three Term Adder

A new PNN-PPN 10T static random access memory (SRAM) cell is presented in this paper. The proposed design aims to address stability of memory cell at worst-case analysis, leakage power analysis, read power analysis and soft error resilience analysis. The proposed design metrics are compared with existing memory cells such as 6T SRAM, feedback control-8T SRAM, low power-9T SRAM, PPN-10T SRAM, schmitt trigger-HT SRAM, low power-8T SRAM. Results observed that the proposed PPN-PNN 10T SRAM improved stability at worst-case analysis, reduces read delay by 0.98x/ 1.08x/ 1.15x/ 1.21x/ 1.15x/ 1.12x times shorter than 6T SRAM/ 8T SRAM/ 9T SRAM/ 10T SRAM/ 11T SRAM/ LP 8T SRAM cells respectively. Moreover, write delay is 1.13x/ 1.06x/ 1.27x times lower than 10T SRAM/ 11T SRAM/ 8T SRAM respectively. Furthermore, leakage power is also reduced. The simulation result shows that the proposed memory cell is suitable for stable and reliable cache memory applications.

A Highly Stable PNN-PPN-10T SRAM Cell With Improved Reliability

Technologies are advancing day by day after the successful implementation of 4G networks Now, mobile technology is footed into 5G communication To provide antenna solutions for 5G communications, a T-shaped multiband antenna has been proposed The T-shaped microstrip patch antenna is intended to operate on 28/38 GHz frequency T-shaped antenna has a compact size and planar geometry with high gain To increase the bandwidth of the antenna, defected ground structures are used These structures are formed by etching rectangular slots in ground

DGS-Based T-Shaped Patch Antenna for 5G Communication Applications

Now a day's, all the electronic gadgets Primary concern on memory requirement. It's a great challenge to fulfil the requirements of the consumers based on memory design on non-volatile devices. But Power Consumption is the main constraint to design flash memories. So different authors proposed different designing strategies on NAND and NOR array based flash memories because of we can write data many time, when there is no supply. In this paper we verified MOS transistor based NAND and NOR array operation and we also verified by using FinFET based NAND and NOR array. By comparing the parameters of Power Consumption, Propagation Delay and Leakage Power we concluded that FinFET based array systems have efficient performance compared CMOS based system.

An Efficient Flash Memory Devices

Realization of modern general purpose processors and DSP processors, Fused multiply adder is very attractive approach for multiply and accumulate instructions. But in various applications like FFT's and others dsp applications have instructions like AB+CD. Hence two term dot product unit is preferred approach for high performance of the processors. Dot product unit multiplies two set of floating point operands and add that products in single operation. Products are no need to be rounded and only sum has to be rounded. Thus the precision is improved. Dot product is implemented in two approaches conventional parallel and fused approach. The presented fused dot product unit decreases the complexity of hardware implementation due to fused technique by allowing shared units compared to conventional parallel approach with discrete units. These all provides fused dot product unit with reduced delay and reduced area and high accuracy as only one rounding operation is performed.

A high speed floating point dot product unit

In present days, technology have been emerging with significant importance mainly in wireless local area network. In this Energy harvesting is playing a key role. The RF Energy harvesting is the collection of small amounts of ambient energy to power wireless devices, Especially, radio frequency (RF) energy has interesting key attributes that make it very attractive for lowpower consumer electronics and wireless sensor networks (WSNs). Commercial RF transmitting stations like Wi-Fi, or radar signals may provide ambient RF energy. Throughout this paper, a specific emphasis is on RFEH, as a green technology that is suitable for solving power supply to WLAN node-related problems throughout difficult environments or locations that cannot be reached. For RF harvesting RF signals are extracted using antennas.in this work to extract RF energy from 2.4GHz an array of rectangular microstrip patch antenna is designed.1×8 array provides gain of 15.04dB with a bandwidth of 2% at WLAN frequencies Keywords— Microstrip Antenna, Antenna Array, Gain, Effective Area, RF Energy Harvesting.

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Patch Antenna Array for RF Energy Harvesting Systems in 2.4 GHz WLAN Frequency Band

In order to identify vehicle accidents and send the accident location information to the vehicle owner, the nearest hospital and a police station through a web service, an IoT-based accident and rescue information system has been developed. The contact between the Web server and the hardware system is made via GSM / GPRS, with a GPS shield. Vibration sensors, keypad and buzzer are used to identify the incident. The project is built to collect data in real time using a web application, Android mobile app or SMS for the hardware computer. This project ensures the correct identification of the accident site in the nearest police station and hospitals and sends a notice.

Akash Kumar Gupta

Papers

DGS-Based T-Shaped Patch Antenna for 5G Communication Applications

An Efficient Flash Memory Devices

A high speed floating point dot product unit

Patch Antenna Array for RF Energy Harvesting Systems in 2.4 GHz WLAN Frequency Band

Accident alert system using IoT