This paper presents a 30–36 GHz limiter low‐noise amplifier (limiter‐LNA) MMIC for high power and high mobility millimeter‐wave radar systems. The PIN‐diode limiter network and the LNA are codesigned to realize high input‐power handling capability, good small‐signal performance, and small chip area. A two‐state matching capacitor is presented to improve both the input‐power handling capability at the high input‐power level and the input return loss at the small‐signal level. The proposed circuit is fabricated with a combined PIN/0.15‐µm‐GaAs‐pHEMT process. The limiter‐LNA is capable of handling 39 dBm continuous wave (CW) input‐power without failure with only two limiter stages. The measured noise figure is 1.8–2.5 dB, the small‐signal gain is 18.5 ± 0.5 dB, the output power at 1 dB compression point is larger than 11 dBm, and the dc power consumption is 72 mW. The chip area, including testing pads, is only 2.1 mm × 1.0 mm. This limiter‐LNA MMIC is believed to have the highest input‐power handling capability and smallest chip area among limiter‐LNA MMICs at this frequency range reported up to date.

A compact Ka‐band limiter‐low noise amplifier MMIC with high power capability

This work presents a highly robust 1.5 – 18 GHz high dynamic range power limiter, low noise amplifier (LNA) and mixer IC. A novel power limiter design concept is introduced, which stands out for its low capacitive behavior. The circuit withstands input power levels up to 25 dBm while demonstrating a good noise matching up to 18 GHz. The design approach features a distributed fully differential LNA and a double balanced common base input mixer to enhance the linearity and the wideband performance. The active power limiter, LNA and mixer IC was fabricated on a 130 nm SiGe BiCMOS technology, it draws a total of 62 mA from a 3 V DC power supply and the active IC area is 0.65 mm2.

Highly Robust 130 nm SiGe BiCMOS Power Limiter, LNA and Mixer IC for a Wideband 1.5 - 18 GHz MIMO Radar Receiver

A microwave-chip-based coherent multi-frequency RF driver is developed for a channel-interleaved photonic analog-to-digital converter (PADC) system, which comprises a multi-class optical demultiplexer and supports a sampling speed of 40 GSa/s. The generated signals from the RF driver are adjustable in both amplitude and phase. We analyze the relationship between the characteristics of the generated RF driver signals and the demultiplexing performance in theory based on the optical signal-to-distortion ratio (OSDR). It is the most effective parameter to evaluate the performance of the demultiplexer in a PADC system without an electronic analog-to-digital converter. By precisely adjusting the amplitude and phase of signals, the OSDR is optimized. The results verify the compatibility between the RF driver and the PADC system.

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Optimization of optical signal-to-distortion ratio in a channel-interleaved photonic ADC via a coherent multi-frequency RF driver

Design and implementation of a 700–2,600 MHz RF SiP module for micro base station

This paper details the development of high thermal conductivity (395 W/mK) metal package which is suitable for high-gain and high-power multi-chip modules (MCM). This package is designed using thermal analysis data to meet the long-term reliability. Thermal modeling was done to estimate the thermal resistance and design of package made to minimize the thermal resistance in the heat dissipation path. It is a dual cavity structure MCM suitable for packaging GaAs-based MMICs working up to Ku-Band. This is a two-cavity package with dimensions 17.2 mm×10 mm×3.5 mm and they are internally separated cavities to handle the high gain and power, and the same package 3D EM simulation is done in CST studio 2016. This modeled package is optimized and fabricated by using copper material to meet the thermal management requirements of a power amplifier operated in CW mode. The S-parameter measurements were carried out over broadband also but considered over 6–18 GHz and test parameters resulted in typical S21 of 40 dB, S11 of 10 dB, S22 of 5 dB, and output power of 33 dBm. Thermal analysis is carried out using thermalyze software for analyzing the rise in junction temperature during DC biasing conditions and to calculate the necessity of junction cooling to get the highest output power. Temperatures at three stages are 100.13, 99.85 and 83.38 °C with the base plate maintained at a constant temperature of 60 °C. Further, studies carried out on different base materials for good heat flow and CTE match with GaAs dies as copper tungsten and copper–molybdenum copper. 

Electromagnetic Simulation and Realization of MCM GaAs MMICs Based Packaging for High Gain (40 dB) and High-Power (33dBm) Transmitter Applications

This paper describes design and development of an ultra-wideband receiver protection limiter realized using 0.13um pHEMT technology. The limiter achieves very low insertion loss of > 1dB, wide band match S11/S22 > 10dB) and high power handling of 33dBm (2W) over a very high bandwidth of 0.5 to 18GHz. The flat leakage power of the designed limiter is 20dBm. The chip is realized in a very compact size of 1.6×0.71mm.

Ultra Wideband Receiver Protection Limiter Using 0.13m pHEMT Technology

this paper details a multi-chip module (MCM) suitable for GaAs monolithic microwave integrated circuit common control high gain block MCM package design, 3D EM simulation of the package, package fabrication and end module level execution, which includes assembly and testing under various environmental test conditions as per the space standards This MCM package designed using three internally separated cavities for individual cavity isolation, 4-RF Ports, 10mil thin film microstrip line and optimized wire bonding interconnects, and the same package is EM simulated using a CST microwave studio This package modelled and fabricated using kovar material This MCM package proposed to house a chain of four amplifiers with a common gain of 69dB, 2 SPDT switches with insertion loss of 36dB, a digital attenuator with initial attenuation of 25dB with TTL driver and 2 thermopads of 3dB individual attenuation This package resonating frequency is 7484GHz The packaged MCM measurements are carried out over a frequency of 11GHz-14GHz and resulted with S21 of 60dB, S11&S22 of better than 15dB and P1dB out of 15dBm

Multi-chip Module Based GaAs MMICs Packaging for L-Band High Gain Application

In this paper we present an improved Compact Nonlinear model for MESFETs. Curtice Cubic Model is selected as the basis to model the transfer characteristics of device due to its suitability to the device characteristic under investigation. Gate source voltage (V gs ) dependence of output transfer characteristics is accommodated in proposed model without increasing the number of coefficients of polynomial. Drain source voltage (V ds ) dependence of input transfer characteristics is further investigated and accommodated to improve the model fitting to device characteristics with only one additional coefficient. Improvement in proposed model is compared in terms of the sum of squares due to error (SSE) and Root Mean Square Error (RMSE). The proposed Model has SSE and RMSE values of 0.0004253 and 0.0005 respectively as compared to Curtice Cubic Model having corresponding values of 0.002638 and 0.001245.

Improved Compact Nonlinear Modeling of DC I-V Characterstics of MESFETs

In this paper design of ceramic package and modelling of the package to meet the demands of low-cost and lower parasitic interconnect technology for wideband is presented. This proposed package suitability for high gain GaAs MMIC packaging in wideband frequency range with lower parasitic effects on MMIC performance is also presented. It is a 7 × 7 ceramic package with 48-pins. This proposed structure is embedded with GaAs MMICs working before the resonance frequency of the packaging. For proper grounding the package base is metal selected with sufficient number of filled via holes. The package base metal and the package pins are gold plated to suit for die bonding and also for wire bonding. This package pins are with 0.3 mm width and 0.2 mm spacing between the pins distributed four sides equally without leads. This no leads pin packaging structure gives very good benefits at microwave frequency due to lower inductance and higher isolation between pins. This package structure also shows with lower electromagnetic interference and electromagnetic coupling between pins and die. For MMICs functionality test a separate test structure is designed for RF lines and DC lines and fabricated on FR4 substrate with properly modelled transmission lines at input and output. This proposed package is EM simulated in CST microwave studio. The fabricated ceramic package contains 50 ohm lines fabricated with the thin film technology as well as IO RF connector working in wideband frequency range and their corresponding S11, S22, S21 and NF are recorded. This package resulted with typical S21 of 23 dB, S11 and S22 of better than 10 dB and typical NF of 2.5 dB which are in line with MMIC simulation data. Gain flatness over the frequency is less than ± 0.3 dB and a NF of less than ± 0.05.

Design and Development of High Performance Ceramic Packaging for Low Noise and High Gain GaAs MMIC

this paper presents modelling of high gain metal package, which is suitable for packaging of GaAs monolithic microwave integrated circuit working upto 31.228GHz and high gain. This 8mmX6mmX2.5mm package houses 6-RF ports, 6-DC ports, microstrip lines and optimized wire bonding interconnects. This package is 3D EM simulated using a CST microwave studio. The modelled package is fabricated using brass material. This package can be used as a 40dB gain block amplifier, MCM, High isolation switches, transmitter chain upto 40dB gain and can be used as a receiver chain because of its high gain accommodation capability over the broadband frequency range. The fabricated package contains 50-ohm transmission lines fabricated with the thin film technology and input output RF connector working in broadband frequency range upto 40GHz and DC connectors. All ports S-parameters S11, S12, S21 and S22 are recorded and compared with offset ports s-parameters. Port selection analysis carried out in three configurations whereas offset port selection as shown 10 dB improvement in isolation compared to straight ports selection.

Anant A Naik

Papers

Ultra Wideband Receiver Protection Limiter Using 0.13m pHEMT Technology

Multi-chip Module Based GaAs MMICs Packaging for L-Band High Gain Application

Improved Compact Nonlinear Modeling of DC I-V Characterstics of MESFETs

Design and Development of High Performance Ceramic Packaging for Low Noise and High Gain GaAs MMIC

Improved Package Isolation for High Gain MMIC Packaging Using offset Port Selection Technique