The mechanisms of using an interposer frame to package a semiconductor die enables fan-out structures and reduces form factor for the packaged semiconductor die. The mechanisms involve using a molding compound to attach the semiconductor die to the interposer frame and forming a redistribution layer on one or both sides of the semiconductor die. The redistribution layer(s) in the package enables fan-out connections and formation of external connection structures. Conductive columns in the interposer frame assist in thermal management.

Packaging with interposer frame

Packaging is a core technology to leverage the functions and the performances of micro- and nano-structures in a system. In order to bring them to application, the gap between component and environment has to be bridged by providing reliable interfaces. This paper reviews the packaging of optoelectronic, photonic, and microelectromechanical systems (MEMS) components. State-of-the-art requirements, standard technologies, and approaches are considered. Recent trends and research results in the packaging of advanced photonic, MEMS, Si-photonic components, and in 3-D, heterogeneous integration, and SiP are discussed.

Review of Packaging of Optoelectronic, Photonic, and MEMS Components

Recent Advances and New Trends in Flip Chip Technology

Copper wire bonding of microelectronic parts has developed as a means to cut the costs of using the more mature technology of gold wire bonding. However, with this new technology, changes in the bonding processes as well as bonding metallurgy can affect product reliability. This paper discusses the challenges associated with copper wire bonding and the solutions that the industry has been implementing. The paper also provides information to enable customers to conduct qualification and reliability tests on microelectronic packages to facilitate adoption in their target applications.

https://www.tpbin.com/Uploads/Subjects/9e60b56e-e1c1-41bb-abcc-d2e01e0c4809.pdf

Copper Wire Bonding Concerns and Best Practices

Challenges and developments of copper wire bonding technology

Fine pitch copper wire bonding in high volume production

Fine pitch Cu wire bonding is at the cusp of becoming main stream. Many challenges had to be overcome when making the transition from fine pitch Au wire bonding to fine pitch Cu wire bonding in a high volume manufacturing environment. The challenges for Cu wire bonding arise from the inherent properties of Cu: propensity to oxidize, increased hardness, slow intermetallic growth whilst dice are (still) designed for packaging with Au wire bonding i.e. pad metal stack and thickness.

Fine pitch copper wire bonding — Why now?

The advanced QFN (aQFN) package is an enhanced version of conventional QFN (Quad Flat No-Lead) with multiple row terminals of featuring higher number of I/O ports. aQFN thermal and electrical performance are superior due to smaller profile, shorter interconnects. Also, the solder wettability control and board-level thermo-mechanical reliability are greatly enhanced over conventional QFN because of the higher package standoff. aQFN provides similar I/O number approaching that of a BGA-type chip-scale package (CSP) but much less cost since the expensive substrate is replaced by lead frame. aQFN turns out to be an ideal low cost solution for electrical components of portable telecommunication applications. With such advantages, the replacement of BGA-type CSP with aQFN from low pin-count up to medium high pin-count applications is therefore highly expectable, especially for handheld & PDA devices with its relative applications. In this paper, aQFN is introduced in terms of its application advantages, development, fabrication process flow, SMT process with stencil design guideline. The simulation results indicate that thermal and electrical performances of aQFN are much better than BGA-type CSP, when the same functions are to be designed in SMT process.

Advanced QFN packaging for low cost and solution

The advanced Quad Flat No-Lead (aQFN) package is an enhanced version of conventional QFN with multiple row terminals of featuring higher number of I/O ports. The aQFN thermal and electrical performance are superior due to smaller profile and shorter interconnects and the solder wettability control and board-level thermo-mechanical reliability are greatly enhanced over conventional QFN because of the higher package standoff. aQFN provides similar I/O number approaching that of a BGA-type chip-scale package (FBGA) but much less cost since the expensive substrate is replaced by lead frame. aQFN turns out to be an ideal low cost solution for electrical components of portable telecommunication applications such as IrDA, blue-tooth, RFID, cell phone baseband etc. for its superior thermal, electrical, reliability performances and miniaturized package size, With such advantages, the replacement of FBGA with aQFN in low up to medium lead-count applications is therefore highly expectable, especially for handheld & PDA devices with its related applications. With such higher pin-count, multi-row and small terminal pitch than QFN, how to design the aQFN package terminals for printed circuit board layout and the stencil patterning and opening for solder paste printing become crucial issues. aQFN will be introduced in terms of its application advantages, development, fabrication process flow, SMT process with stencil design guideline for surface mount assembly yield. Finally, “Surface Mount Application Notes” have been issued.

Advanced QFN Surface Mount Application Notes development

Wire bonding has been the predominant interconnect technology for more than 40 years and even today is holding a market share of more than 85%. The standard wire material has been gold albeit copper and aluminum wires have been used for 20 or so years in power applications. In the past few years, economics, i.e. the explosive increase in gold commodity pricing, have lead to a rapid conversion of fine diameter gold wire packages to copper wire packages. The conversion was lead by consumer products which were most price sensitive and perceived to be least demanding in reliability due to the nature of the application and the relatively short life. For these products, a good track record has been established which then lead to an extension of the applications to computer and communication applications. Now, automotive and networking applications are also implementing copper wires as interconnects without sacrificing their stringent reliability and long life requirements. All of the recent conversion activity has spurned many research and application publications about copper wire bonding Discussion 1 Section Header to report on copper wire itself, the bonding process and intermetallic compound formation, effect of mold compounds, reliability performance, etc. Wire suppliers have developed and introduced new copper based wires, mold compound suppliers have purified mold compounds to suppress corrosion and equipment suppliers have developed copper wire specific bonders. Here, the successful implementation and ‘long term’ copper wire bonding experience for a wide range of applications and range of wafer nodes will be reported. A strict methodology for assessing bondability for any new device will be discussed. This methodology was found to be necessary due to the subtle differences in pad design even when devices are built in the same fab. Clearly, advanced wafer nodes based on LK and ELK dielectrics have rather small process windows and do require rigorous tuning of bonders control of assembly processes and manufacturing floor as well as specific training of operators. Such a methodology plus the proper choice of materials are essential for the success and the long term reliability of copper wire bonds as will be demonstrated in this paper. It will be shown that JEDEC tests can be extended to exceed the typical test durations by more than five or six times. The high reliability of copper wire bonds is based on the very slow copper aluminum intermetallic growth. Such reliability performance as well as near gold assembly yields lead to the level of confidence to start automotive application qualifications. The first set of results of successful automotive application qualification per ACE-Q100 requirements will be presented to demonstrate readiness for manufacturing.

Andy Tseng

Papers

Fine pitch copper wire bonding in high volume production

Fine pitch copper wire bonding — Why now?

Advanced QFN packaging for low cost and solution

Advanced QFN Surface Mount Application Notes development

Is copper wire bonding ready for automotive applications