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Boyi Zhang
Researcher at University of Florida
Publications - 20
Citations - 335
Boyi Zhang is an academic researcher from University of Florida. The author has contributed to research in topics: Power module & Inductor. The author has an hindex of 6, co-authored 16 publications receiving 111 citations.
Papers
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Journal ArticleDOI
A Survey of EMI Research in Power Electronics Systems With Wide-Bandgap Semiconductor Devices
Boyi Zhang,Shuo Wang +1 more
TL;DR: The literature on EMI research in power electronics systems with WBG devices is reviewed, and the EMI-related reliability issues are discussed, and solutions and guidelines are presented.
Journal ArticleDOI
Analysis and Reduction of the Near Magnetic Field Emission From Toroidal Inductors
Boyi Zhang,Shuo Wang +1 more
TL;DR: In this article, a toroidal inductor with a small extra toroid was proposed to reduce the near magnetic field emission from magnetic components and improve the high-frequency electromagnetic interference (EMI) performance.
Journal ArticleDOI
Parasitic Inductance Modeling and Reduction for Wire-Bonded Half-Bridge SiC Multichip Power Modules
Boyi Zhang,Shuo Wang +1 more
TL;DR: In this paper, the authors developed an inductance model that includes the parasitic mutual inductance between parallel current path segments for SiC multichip power modules and improved the package layout based on the transient analysis.
Proceedings ArticleDOI
An Overview of Wide Bandgap Power Semiconductor Device Packaging Techniques for EMI Reduction
Boyi Zhang,Shuo Wang +1 more
TL;DR: Characteristics of WBG power devices as EMI noise sources are investigated, package design considerations that could reduce EMI are reviewed, and package layout determined characteristics has not yet been connected to electromagnetic compliance (EMC) analysis.
Proceedings ArticleDOI
Parasitic Inductance Modeling and Reduction for a Wire Bonded Half Bridge SiC MOSFET Multichip Power Module
Boyi Zhang,Shuo Wang +1 more
TL;DR: In this paper, the parasitic inductance of the current commutation loop is modeled with Partial Element Equivalent Circuit (PEEC) method for SiC multichip module, and a wire-bonded package layout is then proposed for IC half bridge modules.