C
Cameron D. Patterson
Researcher at Virginia Tech
Publications - 77
Citations - 1661
Cameron D. Patterson is an academic researcher from Virginia Tech. The author has contributed to research in topics: Field-programmable gate array & Reconfigurable computing. The author has an hindex of 21, co-authored 76 publications receiving 1604 citations. Previous affiliations of Cameron D. Patterson include Xilinx.
Papers
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Journal ArticleDOI
Cognitive Radio and Networking Research at Virginia Tech
Allen B. MacKenzie,Jeffrey H. Reed,Peter Athanas,Charles W. Bostian,R.M. Buehrer,Luiz A. DaSilva,Steven W. Ellingson,Y.T. Hou,Michael S. Hsiao,Jung-Min Park,Cameron D. Patterson,Sanjay Raman,C.R.C.M. da Silva +12 more
TL;DR: This paper considers the analysis of cognitive systems using game theory and the application of cognitive techniques to problems in dynamic spectrum sharing and control of multiple-input multiple-output radios.
Proceedings Article
High Performance DES Encryption in Virtex(tm) FPGAs Using Jbits(tm)
TL;DR: A JBits implementation of the Data Encryption Standard (DES) algorithm in a Virtex FPGA with a throughput of over 10 Gigabits per second, which exceeds the performance of a recently announced DES ASIC.
Patent
Hetergeneous method for determining module placement in FPGAs
L. James Hwang,Eric F. Dellinger,Sujoy Mitra,Sundararajarao Mohan,Cameron D. Patterson,Ralph D. Wittig +5 more
TL;DR: The Self Implementing Modules (SIMs) as discussed by the authors are parametric modules that implement themselves at the time the design is elaborated, targeting a specified FPGA according to specified parameters.
Patent
Method and apparatus for defining and modifying connections between logic cores implemented on programmable logic devices
Eric Keller,Cameron D. Patterson +1 more
TL;DR: In this paper, a method and apparatus for generating a configuration bitstream for a programmable logic device using logic ports associated with logic cores is presented, where logic ports are associated with respective ones of a plurality of logic cores, and logical connections are made between selected ones of the ports of the logic cores.
Proceedings ArticleDOI
Wires on Demand: Run-Time Communication Synthesis for Reconfigurable Computing
Peter Athanas,J. Bowen,T. Dunham,Cameron D. Patterson,J. Rice,M. Shelburne,J. Suris,M. Bucciero,Jonathan Graf +8 more
TL;DR: This work allocates a sandbox region in which modules from a library can be flexibly placed and interconnected, insulating the designer from reconfiguration details.