Nanowires and nanotubes carry charge and excitons efficiently, and are therefore potentially ideal building blocks for nanoscale electronics and optoelectronics. Carbon nanotubes have already been exploited in devices such as field-effect and single-electron transistors, but the practical utility of nanotube components for building electronic circuits is limited, as it is not yet possible to selectively grow semiconducting or metallic nanotubes. Here we report the assembly of functional nanoscale devices from indium phosphide nanowires, the electrical properties of which are controlled by selective doping. Gate-voltage-dependent transport measurements demonstrate that the nanowires can be predictably synthesized as either n- or p-type. These doped nanowires function as nanoscale field-effect transistors, and can be assembled into crossed-wire p-n junctions that exhibit rectifying behaviour. Significantly, the p-n junctions emit light strongly and are perhaps the smallest light-emitting diodes that have yet been made. Finally, we show that electric-field-directed assembly can be used to create highly integrated device arrays from nanowire building blocks.

Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices

One-dimensional nanostructures, such as nanowires and nanotubes, represent the smallest dimension for efficient transport of electrons and excitons and thus are ideal building blocks for hierarchical assembly of functional nanoscale electronic and photonic structures. We report an approach for the hierarchical assembly of one-dimensional nanostructures into well-defined functional networks. We show that nanowires can be assembled into parallel arrays with control of the average separation and, by combining fluidic alignment with surface-patterning techniques, that it is also possible to control periodicity. In addition, complex crossed nanowire arrays can be prepared with layer-by-layer assembly with different flow directions for sequential steps. Transport studies show that the crossed nanowire arrays form electrically conducting networks, with individually addressable device function at each cross point.

https://science.sciencemag.org/content/sci/291/5504/630.full.pdf

Directed Assembly of One-Dimensional Nanostructures into Functional Networks

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New approaches to nanofabrication: molding, printing, and other techniques.

The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

http://science.sciencemag.org/content/sci/311/5758/208.full.pdf

Stretchable form of single crystal silicon for high performance electronics on rubber substrates

▪ Abstract Semiconductor nanowires and nanotubes exhibit novel electronic and optical properties owing to their unique structural one-dimensionality and possible quantum confinement effects in two dimensions. With a broad selection of compositions and band structures, these one-dimensional semiconductor nanostructures are considered to be the critical components in a wide range of potential nanoscale device applications. To fully exploit these one-dimensional nanostructures, current research has focused on rational synthetic control of one-dimensional nanoscale building blocks, novel properties characterization and device fabrication based on nanowire building blocks, and integration of nanowire elements into complex functional architectures. Significant progress has been made in a few short years. This review highlights the recent advances in the field, using work from this laboratory for illustration. The understanding of general nanocrystal growth mechanisms serves as the foundation for the rational sy...

/pdf/semiconductor-nanowires-and-nanotubes-27j4coa812.pdf

Semiconductor nanowires and nanotubes

This letter describes an electric-field assisted assembly technique used to position individual nanowires suspended in a dielectric medium between two electrodes defined lithographically on a SiO2 substrate. During the assembly process, the forces that induce alignment are a result of nanowire polarization in the applied alternating electric field. This alignment approach has facilitated rapid electrical characterization of 350- and 70-nm-diameter Au nanowires, which had room-temperature resistivities of approximately 2.9 and 4.5×10−6 Ω cm.

Electric-field assisted assembly and alignment of metallic nanowires

An electro-fluidic assembly process for integration of an electronic device or component onto a substrate which comprises: disposing components within a carrier fluid; attracting the components to an alignment sites on the substrate by means of electrophoresis or dielectrophoresis; and aligning the components within the alignment site by means of energy minimization. The substrate comprises: a biased backplane layer, a metal plane layer having one or more alignment sites, a first insulating layer disposed between the backplane layer and the metal plane layer, and a second insulating layer, e.g., benzocyclobute, having a recess disposed therein, wherein the second insulating layer is on the surface of the metal plane layer opposite from the first insulating layer and wherein the recess is in communication with the alignment site.

Electro-fluidic assembly process for integration of electronic devices onto a substrate

This paper introduces an electro-fluidic assembly approach that provides a potential route towards a low-cost, parallel heterogeneous integration process suitable for III-V device integration. In this process, nonuniform electric fields are used to attract III-V devices from a carrier fluid to a Si substrate patterned with predefined alignment locations. We have demonstrated the utility of this approach by assembling Au die using circular apertures defined on an oxidized Si substrate.

An electro-fluidic assembly technique for integration of III-V devices onto silicon

We show that epitaxial layers suitable for fabrication of AlGaAs/GaAs heterojunction bipolar transistors with a carbon base doping level of up to 1020 cm−3 can be grown by solid-source molecular beam epitaxy using CBr4 as a doping precursor. We have observed that the gain of devices fabricated from these layers is improved using an abrupt conduction-band discontinuity at the emitter–base heterointerface. The observed relationship between current gain and the base width Wb of these devices deviates from the 1/Wb2 dependence predicted by diffusive electron transport for base widths that are shorter than 60 nm. The relationship is better approximated by a 1/Wb dependence, which is in better agreement with the theories of ballistic or quasiballistic electron transport. Current gain of the devices drops rapidly as the base thickness exceeds 60 nm.

GaAs/AlGaAs heterojunction bipolar transistors with a base doping 1020 cm−3 grown by solid-source molecular beam epitaxy using CBr4

A process for fabrication of heterojunction bipolar transistors (HBTs) with selectively buried subcollectors by molecular beam epitaxy (MBE) regrowth is described. This process can be used to reduce parasitic base-collector capacitance of HBTs and improve the speed of these devices. In situ etching by iodine prior to the regrowth was used for the first time to improve the quality of the substrate epilayer interface in a semiconductor device grown by MBE. The secondary ion mass spectroscopy depth profiles of regrown HBT structures suggest that the in situ surface cleaning by molecular iodine was not sufficient to remove all contamination from the substrate epilayer interface and that the microwave performance of HBTs fabricated by this process may have been affected by that contamination. The dc performance of devices which were fabricated by our process was not affected, however, by the contamination and was comparable to the dc performance of conventional HBTs. Our results suggest that the described proc...

Fabrication of heterojunction bipolar transistors with buried subcollector layers for reduction of base-collector capacitance by molecular beam epitaxy regrowth

Christopher D. Nordquist

Papers

Electric-field assisted assembly and alignment of metallic nanowires

Electro-fluidic assembly process for integration of electronic devices onto a substrate

An electro-fluidic assembly technique for integration of III-V devices onto silicon

GaAs/AlGaAs heterojunction bipolar transistors with a base doping 1020 cm−3 grown by solid-source molecular beam epitaxy using CBr4

Fabrication of heterojunction bipolar transistors with buried subcollector layers for reduction of base-collector capacitance by molecular beam epitaxy regrowth