Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

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High-κ gate dielectrics: Current status and materials properties considerations

Diamond-like carbon (DLC) is a metastable form of amorphous carbon with significant sp3 bonding. DLC is a semiconductor with a high mechanical hardness, chemical inertness, and optical transparency. This review will describe the deposition methods, deposition mechanisms, characterisation methods, electronic structure, gap states, defects, doping, luminescence, field emission, mechanical properties and some applications of DLCs. The films have widespread applications as protective coatings in areas, such as magnetic storage disks, optical windows and micro-electromechanical devices (MEMs).

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Diamond-like amorphous carbon

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Damascene Cu electroplating for on-chip metallization, which we conceived and developed in the early 1990s, has been central to IBM's Cu chip interconnection technology. We review here the challenges of filling trenches and vias with Cu without creating a void or seam, and the discovery that electrodeposition can be engineered to give filling performance significantly better than that achievable with conformal step coverage. This attribute of superconformal deposition, which we call superfilling, and its relation to plating additives are discussed, and we present a numerical model that represents the shape-change behavior of this system.

Damascene Copper electroplating for chip interconnections

During the past two decades, diamond-like carbon (DLC) films have attracted an overwhelming interest from both industry and the research community. These films offer a wide range of exceptional physical, mechanical, biomedical and tribological properties that make them scientifically very fascinating and commercially essential for numerous industrial applications. Mechanically, certain DLC films are extremely hard (as hard as 90 GPa) and resilient, while tribologically they provide some of the lowest known friction and wear coefficients. Their optical and electrical properties are also extraordinary and can be tailored to meet the specific requirements of a given application. Because of their excellent chemical inertness, these films are resistant to corrosive and/or oxidative attacks in acidic and saline media. The combination of such a wide range of outstanding properties in one material is rather uncommon, so DLC can be very useful in meeting the multifunctional application needs of advanced mechanical systems. In fact, these films are now used in numerous industrial applications, including razor blades, magnetic hard discs, critical engine parts, mechanical face seals, scratch-resistant glasses, invasive and implantable medical devices and microelectromechanical systems. DLC films are primarily made of carbon atoms that are extracted or derived from carbon-containing sources, such as solid carbon targets and liquid and gaseous forms of hydrocarbons and fullerenes. Depending on the type of carbon source being used during the film deposition, the type of bonds (i.e. sp 1 ,s p 2 ,s p 3 ) that hold carbon atoms together in DLC may vary a great deal and can affect their mechanical, electrical, optical and tribological properties. Recent systematic studies of DLC films have confirmed that the presence or absence of certain elemental species, such as hydrogen, nitrogen, sulfur, silicon, tungsten, titanium and fluorine, in their microstructure can also play significant roles in their properties. The main goal of this review paper is to highlight the most recent developments in the synthesis, characterization and application of DLC films. We will also discuss the progress made in understanding the fundamental mechanisms that control their very unique friction and wear behaviours. Novel design concepts and the principles of superlubricity in DLC films are also presented. (Some figures in this article are in colour only in the electronic version)

https://iopscience.iop.org/article/10.1088/0022-3727/39/18/R01/pdf

Tribology of diamond-like carbon films: recent progress and future prospects

A low dielectric constant, thermally stable hydrogenated oxidized silicon carbon film which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a thermally stable hydrogenated oxidized silicon carbon low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of thermally stable hydrogenated oxidized silicon carbon low dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of thermally stable hydrogenated oxidized silicon carbon low dielectric constant film, specific precursor materials having a ring structure are preferred.

Hydrogenated oxidized silicon carbon material

A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to interconnect structures containing multiple wiring levels, and is compatible with Dual Damascene Back End of the Line (BEOL) processing.

Multilayer interconnect structure containing air gaps and method for making

A method to achieve a very low effective dielectric constant in high performance back end of the line chip interconnect wiring and the resulting multilayer structure are disclosed. The process involves fabricating the multilayer interconnect wiring structure by methods and materials currently known in the state of the art of semiconductor processing; removing the intralevel dielectric between the adjacent metal features by a suitable etching process; applying a thin passivation coating over the exposed etched structure; annealing the etched structure to remove plasma damage; laminating an insulating cover layer to the top surface of the passivated metal features; optionally depositing an insulating environmental barrier layer on top of the cover layer; etching vias in the environmental barrier layer, cover layer and the thin passivation layer for terminal pad contacts; and completing the device by fabricating terminal input/output pads. The method obviates issues such as processability and thermal stability associated with low dielectric constant materials by avoiding their use. Since air, which has the lowest dielectric constant, is used as the intralevel dielectric the structure created by this method would possess a very low capacitance and hence fast propagation speeds. Such structure is ideally suitable for high density interconnects required in high performance microelectronic device chips.

Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the same

The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are filled with conductive material to form the wiring and via levels. The invention comprises a twice patterned single mask layer Dual Damascene process modified by the addition of an easy-to-integrate sidewall liner to protect organic interlevel and intralevel dielectrics from potential damage induced by photoresist stripping steps during lithographic rework. The invention further comprises a method for forming a dual pattern hard mask which may be used to form dual relief cavities for use in Dual Damascene processing, said dual pattern hard mask comprising a first set of one or more layers with a first pattern, and a second set of one or more layers with a second pattern.

Dual damascene processing for semiconductor chip interconnects

This invention provides a method and solution for the electroless deposition of Co(P) with a designed coercivity via the programmed addition of supporting electrolytes comprising such sulfur containing compounds as sulfamic acid, potassium sulfate or sodium sulfate to a solution having a source of cobalt ions, a source of citrate ions, a buffering compound to stabilize the pH of the solution, a source of hypophosphite ions and sufficient hydroxide anions to obtain a pH of between about 7 and 9. The magnetized Co(P) material is useful in, for example, rigid magnetic storage disks, hard bias layers for MR thin film heads and magnetic detector tags.

Christopher V. Jahnes

Papers

Hydrogenated oxidized silicon carbon material

Multilayer interconnect structure containing air gaps and method for making

Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the same

Dual damascene processing for semiconductor chip interconnects

Production of electroless Co(P) with designed coercivity