A new method for the extraction of the MOSFET parameters is presented. The method, which relies on combining drain current and transconductance transfer characteristics, enables reliable values of the threshold voltage V/sub t/, the low field mobility mu /sub 0/ and the mobility attenuation coefficient theta to be obtained.

New method for the extraction of MOSFET parameters

Recent studies regarding MOSFETs on SiC reveal that 4H-SiC devices suffer from a low inversion layer mobility, while in 6H-SiC, despite a higher channel mobility the bulk mobility parallel to the c-axis is too low, making this polytype unattractive for power devices. This work presents experimental mobility data of MOSFETs fabricated on different polytypes as well as capacitance-voltage (C-V) measurements of corresponding n-type MOS structures which give evidence that the low inversion channel mobility in 4H-SiC is caused by a high density of SiC-SiO/sub 2/ interface states close to the conduction band. These defects are believed to be inherent to all SiC polytypes and energetically pinned at around 2.9 eV above the valence band edge. Thus, for polytypes with band gaps smaller than 4H-SiC like 6H-SiC and 15R-SiC, the majority of these states will become resonant with the conduction band at room temperature or above, thus remarkably suppressing their negative effect on the channel mobility. In order to realize high performance power MOSFETs the results reveal that 15R-SiC is the best candidate among all currently accessible SiC polytypes.

Significantly improved performance of MOSFETs on silicon carbide using the 15R-SiC polytype

We report the effect of processing variables on the inversion layer electron mobility of (0001)-oriented 4H-SiC n-channel MOSFETs. The process variables investigated include: i) implant anneal temperature and ambient; ii) oxidation procedure; iii) postoxidation annealing in nitric oxide (NO); iv) type of gate material, and v) high-temperature ohmic contact anneal. Electron mobility is significantly increased by a postoxidation anneal in NO, but other process variations investigated have only minor effects on the channel mobility. We also report the temperature dependence of electron mobility for NO and non-NO annealed n-channel MOSFETs.

Effect of process variations and ambient temperature on electron mobility at the SiO/sub 2//4H-SiC interface

A simple parameter extraction technique is presented for ultra-thin oxide MOSFETs. The technique is based on a suitable MOSFET mobility model and extracts threshold voltage ( V t ), mobility ( μ 0 ), and two mobility degradation parameters θ 1 and θ 2 . It has been found that the extracted parameters accurately describe the measured current voltage characteristics for strong inversion.

A simple parameter extraction method for ultra-thin oxide MOSFETs

Basic MOSFET parameters like inversion layer mobility, threshold voltage, intrinsic mobility reduction factor and interface state density extracted from the subthreshold slope were examined in detail for 6H-SiC enhancement-mode n-channel MOSFETs. The inversion layer mobility and the threshold voltage were determined as a function of substrate doping concentration as well as device temperature. The interface state density was studied for different substrate doping concentrations. The inversion layer mobility was found to decrease strongly with increasing substrate doping. In contrast to earlier reports the inversion layer mobility decreases also with temperature. Furthermore, the threshold voltage depends more pronounced on substrate doping and temperature than theoretically expected. The interface state density extracted from the subthreshold slope increases significantly with substrate doping concentration. All these phenomena are consistently interpreted by the classical MOSFET behavior which is extended by acceptor like interface states. These states are located close to the conduction band and exhibit a density increasing drastically toward the band edge.

Detailed investigation of n-channel enhancement 6H-SiC MOSFETs

In this paper we present a new method of determining the principal parameters for short-channel MOSFET modelling: VT, μ0, θ, ΔL and RSD. They are deduced from the experimental curves ID(VG) (for small drain voltages) and ID(VD) (for relatively large gate voltages) curves. The main assumption is that the devices fabricated on the same silicon chip have the same technological reduction of transistor channel length and the same series resistance of source and drain. Our method takes advantageously into account (a) a new accurate determination of the threshold voltage and (b) the variation of the low-field mobility with channel length. Results obtained by applying this method to short-channel devices are given and discussed.

Chu Hao

Papers

Experimental determination of short-channel MOSFET parameters