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Detection, Estimation, and Modulation Theory

国際会議開催報告:2013 IEEE International Symposium on Information Theory

Wireless Sensor Networks (WSNs) are crucial in supporting continuous environmental monitoring, where sensor nodes are deployed and must remain operational to collect and transfer data from the environment to a base-station. However, sensor nodes have limited energy in their primary power storage unit, and this energy may be quickly drained if the sensor node remains operational over long periods of time. Therefore, the idea of harvesting ambient energy from the immediate surroundings of the deployed sensors, to recharge the batteries and to directly power the sensor nodes, has recently been proposed. The deployment of energy harvesting in environmental field systems eliminates the dependency of sensor nodes on battery power, drastically reducing the maintenance costs required to replace batteries. In this article, we review the state-of-the-art in energy-harvesting WSNs for environmental monitoring applications, including Animal Tracking, Air Quality Monitoring, Water Quality Monitoring, and Disaster Monitoring to improve the ecosystem and human life. In addition to presenting the technologies for harvesting energy from ambient sources and the protocols that can take advantage of the harvested energy, we present challenges that must be addressed to further advance energy-harvesting-based WSNs, along with some future work directions to address these challenges.

https://dl.acm.org/doi/pdf/10.1145/3183338

Energy-Harvesting Wireless Sensor Networks (EH-WSNs): A Review

Machine-to-machine (M2M) communications emerge to autonomously operate to link interactions between Internet cyber world and physical systems. We present the technological scenario of M2M communications consisting of wireless infrastructure to cloud, and machine swarm of tremendous devices. Related technologies toward practical realization are explored to complete fundamental understanding and engineering knowledge of this new communication and networking technology front.

Machine-to-machine communications: Technologies and challenges

Social networks overlaid on technological networks account for a significant fraction of Internet use. Through graph theoretic and functionality models, this paper examines social network analysis and potential implications for the design of technological networks, and vice versa. Such interplay between social networks and technological networks suggests new directions for future research in networking.

From Technological Networks to Social Networks

This paper studies the performance of a noisy Gallager B decoder for regular LDPC codes. We assume that the noisy decoder is subject to both transient processor errors and permanent memory errors. We permit different error rates at different functional components. In addition, for the sake of generality, we allow asymmetry in the permanent error rates of component outputs, and thus we model error propagation in the decoder via a suitable asymmetric channel. We then develop a density evolution-type analysis on this asymmetric channel. The recursive expression for the bit error probability is derived as a function of the code parameters (node degrees), codeword weight, transmission error rate, and the error rates of the permanent and the transient errors. Based on this analysis, we then derive the residual error of the Gallager B decoder for the regime where the transmission error rate and the processing error rates are small. In this regime, we further observe that the residual error rate can be well approximated by a suitable combination of the transient error rate and the permanent error rate at variable nodes, provided that the check node degree is large enough. Based on this insight, we then propose and analyze a scheme for detecting permanent errors and correcting detected residual errors. The scheme exploits the parity check equations of the code and reuses the existing hardware to locate permanent errors in memory blocks. Performance analysis and simulation results show that, with high probability, the detection scheme discovers correct locations of permanent memory errors, while, with low probability, it mislabels the functional memory as being defective. The proposed error detection-and-correction scheme can be implemented in-circuit and is useful in combating failures arising from aging.

Gallager B LDPC Decoder with Transient and Permanent Errors

The wide recognition that emerging nano-devices will be inherently unreliable motivates the evaluation of information processing algorithms running on noisy hardware as well as the design of robust schemes for reliable performance against hardware errors of varied characteristics In this paper, we investigate the performance of a popular statistical inference algorithm, belief propagation (BP) on probabilistic graphical models, implemented on noisy hardware, and we propose two robust implementations of the BP algorithm targeting different computation noise distributions We assume that the BP messages are subject to zero-mean transient additive computation noise We focus on graphical models satisfying the contraction mapping condition that guarantees the convergence of the noise-free BP We first upper bound the distances between the noisy BP messages and the fixed point of (noise-free) BP as a function of the iteration number Next, we propose two implementations of BP, namely, censoring BP and averaging BP, that are robust to computation noise Censoring BP rejects incorrect computations to keep the algorithm on the right track to convergence, while averaging BP takes the average of the messages in all iterations up to date to mitigate the effects of computation noise Censoring BP works effectively when, with high probability, the computation noise is exactly zero, and averaging BP, although having a slightly larger overhead, works effectively for general zero-mean computation noise distributions Sufficient conditions on the convergence of censoring BP and averaging BP are derived Simulations on the Ising model demonstrate that the two proposed implementations successfully converge to the fixed point achieved by noise-free BP Additionally, we apply averaging BP to a BP-based image denoising algorithm and as a BP decoder for LDPC codes In the image denoising application, averaging BP successfully denoises an image even when nominal BP fails to do so in the presence of computation noise In the BP LDPC decoder application, the power of averaging BP is manifested by the reduction in the residual error rates compared with the nominal BP decoder

Belief Propagation Algorithms on Noisy Hardware

In this letter, we study the performance of a noisy Gallager B decoder used to decode irregular low-density parity-check (LDPC) codes. We derive the final bit error rate (BER) as a function of both the transmission noise and processing errors. We allow different components of the decoder associated with certain computational units (i.e., bit and check nodes of varying degrees) to have different processing errors. We formulate an optimization problem to distribute available processing resources across different components of a noisy decoder to achieve minimal BER. Simulations demonstrate that the optimal resource allocation derived from our analysis outperforms uninformed (random) resource assignment.

Optimal Design of a Gallager B Noisy Decoder for Irregular LDPC Codes

It is widely recognized that emerging hardware technologies will be inherently unreliable In this paper, we study the performance of finite-alphabet iterative decoders when implemented on noisy hardware built out of unreliable components We derive a recursive expression for the error probability in terms of both the transmission noise and processing errors We allow different components of the decoding algorithm associated with certain computational units (ie, bit and check nodes of varying degrees in the underlying graph) to be implemented using a collection of processors with varying levels of processing error rates Performance analysis and optimal resource allocation of a noisy Gallager E decoder is presented as an application example of our general derivation Simulations demonstrate that the implementation of a noisy iterative decoder according to the proposed analysis-guided optimal resource allocation outperforms implementations based on uninformed resource allocation under the common resource budget

Analysis of finite-alphabet iterative decoders under processing errors

With scaling of process technologies and increase in process variations, embedded memories will be inherently unreliable. Approximate computing is a new class of techniques that relax the accuracy requirement of computing systems. In this paper, we present the A daptive Co ding for approximate Co mputing (ACOCO) framework, which provides us with an analysis-guided design methodology to develop adaptive codes for different computations on the data read from faulty memories. In ACOCO, we first compress the data by introducing distortion in the source encoder, and then add redundant bits to protect the data against memory errors in the channel encoder. We are thus able to protect the data against memory errors without additional memory overhead so that the coded data have the same bit-length as the uncoded data. We design the source encoder by first specifying a cost function measuring the effect of the data compression on the system output, and then design the source code according to this cost function. We develop adaptive codes for two types of systems under ACOCO. The first type of systems we consider, which includes many machine learning and graph-based inference systems, is the systems dominated by product operations. We evaluate the cost function statistics for the proposed adaptive codes, and demonstrate its effectiveness via two application examples: max-product image denoising and naive Bayesian classification. Next, we consider another type of systems: iterative decoders with min operation and sign-bit decision, which are widely applied in wireless communication systems. We develop an adaptive coding scheme for the min-sum decoder subject to memory errors. A density evolution analysis and simulations on finite length codes both demonstrate that the decoder with our adaptive code achieves a residual error rate that is on the order of the square of the residual error rate achieved by the nominal min-sum decoder.

/pdf/acoco-adaptive-coding-for-approximate-computing-on-faulty-3os827fi2z.pdf

Chu-Hsiang Huang

Papers

Gallager B LDPC Decoder with Transient and Permanent Errors

Belief Propagation Algorithms on Noisy Hardware

Optimal Design of a Gallager B Noisy Decoder for Irregular LDPC Codes

Analysis of finite-alphabet iterative decoders under processing errors

ACOCO: Adaptive Coding for Approximate Computing on Faulty Memories