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Chun-Hsien Lin

Researcher at TSMC

Publications -  10
Citations -  195

Chun-Hsien Lin is an academic researcher from TSMC. The author has contributed to research in topics: Wafer & Batch processing. The author has an hindex of 6, co-authored 10 publications receiving 190 citations.

Papers
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Virtual Metrology Modeling for Plasma Etch Operations

TL;DR: This work will use various statistical techniques to address challenges due to the nature of plasma data: high dimensionality, collinearity, overall non-linearity of system, variation of data structure due to equipment condition changing, etc.
Patent

Novel Methodology To Realize Automatic Virtual Metrology

TL;DR: In this article, a method to enable wafer result prediction includes collecting manufacturing data from various semiconductor manufacturing tools and metrology tools; choosing key parameters using an autokey method based on the manufacturing data; building a virtual metrology based on key parameters; and predicting wafer results using the virtual metology.
Patent

System for extraction of key process parameters from fault detection classification to enable wafer prediction

TL;DR: In this paper, a system, method, and computer readable medium for extracting a key process parameter correlative to a selected device parameter are provided, which is determined using a gene map analysis.
Patent

Method and apparatus to enable accurate wafer prediction

TL;DR: In this article, a method for monitoring a processing tool in a semiconductor manufacturing facility includes selecting key hardware parameters for a virtual sensor system based on manufacturing data associated with a fabrication tool.
Patent

Extraction of key process parameter

TL;DR: In this paper, a system, method, and computer readable medium for extracting a key process parameter correlative to a selected device parameter are provided, which is determined using a gene map analysis.