This paper reviews the basic physical mechanisms of the interactions of ionizing radiation with MOS oxides, including charge generation, transport, trapping and detrapping, and interface trap formation. Device and circuit effects are also discussed briefly.

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Total ionizing dose effects in MOS oxides and devices

Electronic devices in space environments can contain numerous types of oxides and insulators. Ionizing radiation can induce significant charge buildup in these oxides and insulators leading to device degradation and failure. Electrons and protons in space can lead to radiation-induced total-dose effects. The two primary types of radiation-induced charge are oxide-trapped charge and interface-trap charge. These charges can cause large radiation-induced threshold voltage shifts and increases in leakage currents. Two alternate dielectrics that have been investigated for replacing silicon dioxide are hafnium oxides and reoxidized nitrided oxides (RNO). For advanced technologies, which may employ alternate dielectrics, radiation-induced voltage shifts in these insulators may be negligible. Radiation-induced charge buildup in parasitic field oxides and in SOI buried oxides can also lead to device degradation and failure. Indeed, for advanced commercial technologies, the total-dose hardness of ICs is normally dominated by radiation-induced charge buildup in either parasitic field oxides and/or SOI buried oxides. Heavy ions in space can also degrade the oxides in electronic devices through several different mechanisms including single-event gate rupture, reduction in device lifetime, and large voltage shifts in power MOSFETs.

Radiation Effects in MOS Oxides

We have identified several features of the 1/f noise and radiation response of metal‐oxide‐semiconductor (MOS) devices that are difficult to explain with standard defect models. To address this issue, and in response to ambiguities in the literature, we have developed a revised nomenclature for defects in MOS devices that clearly distinguishes the language used to describe the physical location of defects from that used to describe their electrical response. In this nomenclature, ‘‘oxide traps’’ are simply defects in the SiO2 layer of the MOS structure, and ‘‘interface traps’’ are defects at the Si/SiO2 interface. Nothing is presumed about how either type of defect communicates with the underlying Si. Electrically, ‘‘fixed states’’ are defined as trap levels that do not communicate with the Si on the time scale of the measurements, but ‘‘switching states’’ can exchange charge with the Si. Fixed states presumably are oxide traps in most types of measurements, but switching states can either be interface tr...

Effects of oxide traps, interface traps, and ‘‘border traps’’ on metal‐oxide‐semiconductor devices

A new technique is presented for separating the threshold-voltage shift of an MOS transistor into shifts due to interface states and trapped-oxide charge. Using this technique, the radiation responses of MOS capacitors and transistors fabricated on the same wafer are compared. A good correlation is observed between p-substrate capacitors and n-channel transistors irradiated at 10 V, as well as between n-substrate capacitors and p-channel transistors irradiated at 0 V. These correlations were verified for samples having large variations in the amount of radiation-induced trapped holes and interface states. An excellent correlation is also observed between n-channel capacitors and n-substrate transistors irradiated under positive bias. The use of capacitors separately fabricated on control wafers for potential use in process development or monitoring is clearly demonstrated.

Correlating the Radiation Response of MOS Capacitors and Transistors

The physical mechanisms that produce rebound have been identified. The positive increase in threshold voltage during a bias anneal is due to annealing of oxide trapped charge. Rebound can be predicted by measuring the contribution to the threshold voltage from radiation-induced interface states immediately after irradiation.

Physical Mechanisms Contributing to Device "Rebound"

The role of hydrogen in the generation of radiation-induced interface-trap and oxide-trapped charge in MOS polysilicon gate capacitors has been investigated. The concentration of radiation-induced interface-trap and oxide-trapped charge measured both immediately after irradiation and after postirradiation anneal increases if high temperature anneals are performed in hydrogen. We have analyzed these results in the context of several models of interface-trap and oxide-trapped charge formation. The mutual increase in the concentration of oxide-trapped charge and the early-time (1 msec to 10 sec) component of interface-trap charge with the amount of hydrogen used during processing suggests that the breaking of Si-H or Si-OH bonds may be responsible for much of the defect formation at or near the silicon/silicon dioxide interface.

The Role of Hydrogen in Radiation-Induced Defect Formation in Polysilicon Gate MOS Devices

The "worst-case" postirradiation response of Sandia hardened n-channel transistors following Co-60 exposure to total dose levels of system interest is demonstrated to occur for zero-volt bias during radiation, and positive bias during a subsequent anneal. This observation is explained in terms of oxide-trapped and interface-state charge buildup and anneal. Additional results are presented which suggest that, for future technologies with very thin gate oxides, worst-case device leakage during irradiation may well occur for zero-volt irradiations. These results highlight the importance of periodically reevaluating the response of MOS devices during and after irradiation to determine worst-case test conditions, particularly as technologies advance and gate insulators become thinner.

A Reevaluation of Worst-Case Postirradiation Response for Hardened MOS Transistors

A series of experiments covering a wide range of dose rate, bias, and annealing conditions has been performed on CMOS test transistors and 2K SRAMs. These experiments, on both hardened and commercial technologies, were designed to address hardness assurance issues associated with total-dose laboratory testing. It is demonstrated that failure dose can be a complicated function of dose rate, and that a peak in the failure-dose versus dose-rate curve generally results when there is a change in failure mode. If only one failure mode exists, then the failure-dose versus doserate curve is monotonic. Implications of proposed changes in MIL-STD-883C, Method 1019.2 are examined in light of their impact on hardness assurance. Our findings support the proposed changes of (1) keeping the time between irradiation and test less than 1 hour and (2) of a more restricted range of dose rate, i.e., 100 to 300 rad(Si)/ s. In addition, it is recommended that zero volt bias be maintained on CMOS devices between irradiation and test. Finally, techniques are presented for relating total-dose hardness as measured in the laboratory to total-dose hardness in real-world space and weapon environments.

D. C. Turpin

Papers

Correlating the Radiation Response of MOS Capacitors and Transistors

Physical Mechanisms Contributing to Device "Rebound"

The Role of Hydrogen in Radiation-Induced Defect Formation in Polysilicon Gate MOS Devices

A Reevaluation of Worst-Case Postirradiation Response for Hardened MOS Transistors

Total-Dose Radiation and Annealing Studies: Implications for Hardness Assurance Testing