The authors introduce an efficient data structure for Boolean function representation and present a new algorithm for the synthesis of multilevel logic. Other algorithms represent Boolean functions in the operational domain using Sum-of-Products representations. The authors prefer the synthesis in the functional domain using the less complex Reed-Muller Expansion. The algorithm bases on a new efficient representation, the so-called functional decision diagrams, which are herewith presented. The authors implemented this algorithm, the results are encouraging. >

Multilevel logic synthesis based on functional decision diagrams

Cyclic codes are an interesting type of linear codes and have wide applications in communication and storage systems due to their efficient encoding and decoding algorithms. In coding theory it is often desirable to know the weight distribution of a cyclic code to estimate the error correcting capability and error probability. In this paper, we present the recent progress on the weight distributions of cyclic codes over finite fields, which had been determined by exponential sums. The cyclic codes with few weights which are very useful are discussed and their existence conditions are listed. Furthermore, we discuss the more general case of constacyclic codes and give some equivalences to characterize their weight distributions.

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Recent progress on weight distributions of cyclic codes over finite fields

The set of 3/sup n/ consistent mixed-polarity Reed-Muller canonical forms of an n-variable switching function is described and the means whereby each form may be derived by a transform on the zero-polarity form is investigated. The computational cost of deducing the optimum polarity expansion is evaluated for various strategies. A ternary map-based method is introduced which enables this search and other operations to be performed in a compact and efficient manner.

Reed-Muller canonical forms with mixed polarity and their manipulations

This paper introduces several new families of decision diagrams for multi-output Boolean functions. The introducedfamilies include several diagrams known from literature (BDDs, FDDs) as subsets. Due to this property, these diagrams canprovide a more compact representation of functions than either of the two decision diagrams. Kronecker Decision Diagrams(KDDs) with negated edges are based on three orthogonal expansions (Shannon, Positive Davio, Negative Davio) and arecreated here for incompletely specified Boolean functions as well. An improved efficient algorithm for the construction ofKDD is presented and applied in a mapping program to ATMEL 6000 fine-grain FPGAs. Four other new families offunctional decision diagrams are also presented: Pseudo KDDs, Free KDDs, Boolean Ternary DDs, and Boolean KroneckerTernary DDs. The last two families introduce nodes with three edges and require AND, OR and EXOR gates for circuitrealization. There are two variants of each of the last two families: canonical and non-canonical. While the canonicaldiagrams can be used as efficient general-purpose Boolean function representations, the non-canonical variants are alsoapplicable to incompletely specified functions and create don't cares in the process of the creation of the diagram.. They leadto even more compact circuits in logic synthesis and technology mapping.

/pdf/multi-level-logic-synthesis-based-on-kronecker-decision-myzlu7o6cm.pdf

Multi-Level Logic Synthesis Based on Kronecker Decision Diagrams and Boolean Ternary Decision Diagrams for Incompletely Specified Functions

Self-dual and self-orthogonal negacyclic codes of length 2 m p n over a finite field

A logic tree employing only 2-input gates is described which is capable of mechanising any desired function of the variable set. The tree can therefore represent either a fixed relationship, or vary adaptively by adjusting the input parameters. It is shown that this structure can be used to derive economic multilevel representations of functions directly from the canonical form which require only 2-input gates. The design procedure can operate effectively with only a simple set of design rules.

Adaptive-logic trees for use in multilevel-circuit design

An unsolved problem in coding theory is the determination of p-nary codes in the Lee metric which will correct more than (p--1)/2 errors. This letter describes a ternary double-error-correcting code which exceeds this bound and which leads to a conjecture for doubling this bound in the general p-nary case, p being a prime.

Nonbinary negacyclic code which exceeds Berlekamp's (p--1)/2 bound

A simple criterion is derived to determine when the auto-correlation function of a ternary-feedback shift-register sequence is zero. This permits the isolation of several types of pseudonoise sequences, including the well known maximal-length sequences as well as many other varieties. Some of these sequences are seen to approximate to white noise even more closely than the familiar maximal-length type.

Ternary pseudonoise sequences

A challenging problem in coding theory is the selection of one word from each nondegenerate equivalence class to form a maximal-size commafree dictionary. The letter describes a new restriction which must be attached to a nonbinary commafree dictionary, if that dictionary is to attain maximum size.

Restriction on nonbinary commafree codes

A new map representation is presented for use in the design of binary logical circuits, in which the complete structure of the function is indicated Based on a ternary weighting system, the map cells are easily enumerated and can be extended into a 3-dimensional form Simplification, factorisation and fan-in design limitations can be performed by simple logical operations on selected areas of the map

D.H. Green

Papers

Adaptive-logic trees for use in multilevel-circuit design

Nonbinary negacyclic code which exceeds Berlekamp's (p--1)/2 bound

Ternary pseudonoise sequences

Restriction on nonbinary commafree codes

Ternary maps for binary functions