D. Mahinda Vilathgamuwa

TL;DR: In this paper, a battery energy storage system (BESS) in a buffer scheme is examined for the purpose of attenuating the effects of unsteady input power from wind farms, and the design problem is formulated as maximization of an objective function that measures the economic benefit obtainable from the dispatched power from the wind farm against the cost of the BESS.

TL;DR: In this paper, a grid-interfacing power quality compensator for three-phase three-wire microgrid applications with consideration of both the power quality of the micro grid and the quality of currents flowing between the microgrid and utility system is proposed.

TL;DR: In this article, a robust control scheme with an outer Hinfin voltage control loop and an inner current control loop is designed and implemented on a medium-voltage (MV)-level dynamic voltage restorer (DVR) system.

TL;DR: It is shown that the proposed control scheme is effective in both balanced and unbalanced sag compensation and load disturbance rejection, as its robustness is explicitly specified.

TL;DR: In this paper, a downstream fault limiting function is proposed and integrated in the dynamic voltage restorer (DVR) operation to limit the flow of large line currents, and therefore restore the PCC voltage as well as protect the DVR system components.