Solid-state switch-mode rectification converters have reached a matured level for improving power quality in terms of power-factor correction (PFC), reduced total harmonic distortion at input AC mains and precisely regulated DC output in buck, boost, buck-boost and multilevel modes with unidirectional and bidirectional power flow. This paper deals with a comprehensive review of improved power quality converters (IPQCs) configurations, control approaches, design features, selection of components, other related considerations, and their suitability and selection for specific applications. It is targeted to provide a wide spectrum on the status of IPQC technology to researchers, designers and application engineers working on switched-mode AC-DC converters. A classified list of more than 450 research publications on the state of art of IPQC is also given for a quick reference.

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A review of single-phase improved power quality AC-DC converters

In the first part of this paper, three-phase power factor correction (PFC) rectifier topologies with sinusoidal input currents and controlled output voltage are derived from known single-phase PFC rectifier systems and/or passive three-phase diode rectifiers. The systems are classified into hybrid and fully active pulsewidth modulation boost-type or buck-type rectifiers, and their functionality and basic control concepts are briefly described. This facilitates the understanding of the operating principle of three-phase PFC rectifiers starting from single-phase systems, and organizes and completes the knowledge base with a new hybrid three-phase buck-type PFC rectifier topology denominated as Swiss Rectifier. Finally, core topics of future research on three-phase PFC rectifier systems are discussed, such as the analysis of novel hybrid buck-type PFC rectifier topologies, the direct input current control of buck-type systems, and the multi-objective optimization of PFC rectifier systems. The second part of this paper is dedicated to a comparative evaluation of four rectifier systems offering a high potential for industrial applications based on simple and demonstrative performance metrics concerning the semiconductor stresses, the loading and volume of the main passive components, the differential mode and common mode electromagnetic interference noise level, and ultimately the achievable converter efficiency and power density. The results are substantiated with selected examples of hardware prototypes that are optimized for efficiency and/or power density.

The Essence of Three-Phase PFC Rectifier Systems—Part II

This paper endeavors to present a comprehensive summary of the causes and effects of voltage unbalance and to discuss related standards, definitions, and mitigation techniques. Several causes of voltage unbalance on the power system and in industrial facilities are presented as well as the resulting adverse effects on the system and on equipment such as induction motors and power electronic converters and drives. Standards addressing voltage unbalance are discussed and clarified, and several mitigation techniques are suggested to correct voltage unbalance problems. This paper makes apparent the importance of identifying potential unbalance problems for the benefit of both the utility and customer.

Assessment of Voltage Unbalance

This paper evaluates three-level topologies as alternatives to two-level topologies in converters for low-voltage applications. Topologies, semiconductor losses, filter aspects, part count, initial cost, and life-cycle cost are compared for a grid interface, a conventional drive application, and a high-speed drive application.

A comparison of three-level converters versus two-level converters for low-voltage drives, traction, and utility applications

This paper proposes an active common-noise canceler (ACC) that is capable of eliminating the common-mode voltage produced by a pulsewidth modulation (PWM) inverter. An emitter follower using complementary transistors and a common-mode transformer are incorporated into the ACC, the design method of which is also presented in detail. Experiments using a prototype ACC, whose design and construction are discussed in this paper, verify its viability and effectiveness in eliminating common-mode voltage in a 3.7 kW induction motor drive using an insulated gate bipolar transistor (IGBT) inverter. Some experimental results show that the ACC makes significant contributions to reducing a ground current and a conducted electromagnetic interference (EMI). In addition, the ACC can prevent an electric shock on a nongrounded motor frame and can suppress motor shaft voltage.

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An active circuit for cancellation of common-mode voltage generated by a PWM inverter

In this paper, an improved inverter output filter is proposed for pulsewidth-modulated (PWM) drive systems. The proposed filter is shown to effectively reduce both the differential and common modes dv/dt at the motor terminals, even in the presence of long motor leads. Reducing differential mode dv/dt reduces overvoltages at the motor terminals and lowers the stress on the motor insulation. Lowering common mode dv/dt is shown to significantly reduce high-frequency leakage currents to ground and induced shaft voltage in the motor. An important advantage of the approach is that the filter can be installed within the inverter enclosure to achieve both the differential and common modes dv/dt reductions at the motor terminals. Thus, the use of the filter can contribute to enhanced bearing life and improve reliability of PWM drive systems. Analysis, design equations, and experimental results on a 480-V 20-hp PWM drive system are presented. The filter configuration is an excellent candidate for many new and retrofit PWM 480-V/575-V drive systems.

An improved inverter output filter configuration reduces common and differential modes dv/dt at the motor terminals in PWM drive systems

In this paper, filtering techniques are investigated to reduce the motor terminal overvoltage, ringing and dv/dt in inverter fed AC motor drive systems where long leads are required. Analysis is presented to show that the distributed L-C of a cable and the PWM inverter switching action lead to motor terminal voltage reflections and ringing that stress the turn insulation and contribute to bearing currents. First and second-order shunt filter designs are analyzed and compared. Detailed design equations to match the filter impedance to the cable surge impedance and to determine the filter component values are presented. It is demonstrated that a second-order shunt filter connected at the motor terminals greatly reduces the overvoltage stress and ringing, and also lowers the dv/dt of the PWM switching pulse. The filter design is shown to be solely dependent on the cable type (L/C ratio) and is independent of the cable length. Simulation and experimental results are presented to verify the proposed filter designs for 50 ft and 100 ft cable lengths.

Filtering techniques to minimize the effect of long motor leads on PWM inverter-fed AC motor drive systems

In this paper, an analysis of common mode voltage or "neutral lift" in the new emerging voltage source inverter type medium voltage adjustable speed drive (MV-ASD) systems is presented. Both cascaded multilevel (CML) inverter and 3-level NPC inverter topologies are analyzed. An equivalent circuit model to determine the common mode voltage stress is presented. Analysis and simulation results are discussed and worst case common mode voltage excursion is computed for an example 800 hp, 4160 V MV-ASD. It is shown that certain system components are excessively stressed and in the MV-ASD system these data are particularly useful in specifying system components and for proper design of the system. Possible effects of common mode voltage and its dv/dt on medium voltage motor bearings are discussed. A new multilevel PWM strategy is introduced which results in zero common-mode voltage. Simulation results are shown to illustrate the effectiveness of these schemes. Finally, experimental results from a 800 hp, 4160 V, MV-ASD system are presented.

Analysis of common mode voltage-"neutral shift" in medium voltage PWM adjustable speed drive (MV-ASD) systems

In this paper, design considerations for twelve-pulse diode rectifier systems operating under utility voltage unbalance and pre-existing harmonic voltage distortion are discussed. For a twelve-pulse diode rectifier system connected in parallel to feed a common DC link via an interphase transformer, it is shown that a small amount of impedance mismatch, utility voltage unbalance or pre-existing voltage distortion drastically affects the current sharing capability of the rectifier bridges. This, in turn, generates additional uncharacteristic and characteristic harmonics thereby increasing the THD. In order to mitigate these effects and ensure proper operation of diode rectifiers, specially designed line reactors termed harmonic blocking reactors (HBRs) are introduced. Analysis and design procedures for HBRs are discussed. Simulation results illustrate improved performance. Experimental results from a laboratory prototype system show close agreement with theory.

Design considerations for 12-pulse diode rectifier systems operating under voltage unbalance and pre-existing voltage distortion with some corrective measures

In this paper analysis of common mode voltage or "neutral shift" in the new emerging voltage source inverter type medium voltage adjustable speed drive (MV-ASD) systems is presented. Both cascaded multi-level (CML) inverter and 3-level NPC inverter topologies are analyzed. An equivalent circuit model to determine the common mode voltage stress is presented. Analysis and simulation results are discussed and worst case common mode voltage excursion is computed for an example 800 HP, 4160 V MV-ASD. It is shown that certain system components are excessively stressed and in the MV-ASD system these data are particularly useful in specifying system components and for proper design of the system. Possible effects of common mode voltage and its dv/dt on medium voltage motor bearings are discussed. A new. Multi-level PWM strategy is introduced which results in zero common-mode voltage. Simulation results are shown to illustrate the effectiveness of these schemes, Finally, experimental results from a 800 HP, 4160 V, MN-ASD system are presented.

D. Rendusara

Papers

An improved inverter output filter configuration reduces common and differential modes dv/dt at the motor terminals in PWM drive systems

Filtering techniques to minimize the effect of long motor leads on PWM inverter-fed AC motor drive systems

Analysis of common mode voltage-"neutral shift" in medium voltage PWM adjustable speed drive (MV-ASD) systems

Design considerations for 12-pulse diode rectifier systems operating under voltage unbalance and pre-existing voltage distortion with some corrective measures

Analysis of common mode voltage-"neutral shift" in medium voltage PWM adjustable speed drive (MV-ASD) systems