An experimental technique is described for observing the effects of switching transients in digital MOS circuits that perturb analog circuits integrated on the same die by means of coupling through the substrate Various approaches to reducing substrate crosstalk (the use of physical separation of analog and digital circuits, guard rings, and a low-inductance substrate bias) are evaluated experimentally for a CMOS technology with a substrate comprising an epitaxial layer grown on a heavily doped bulk wafer Observations indicate that reducing the inductance in the substrate bias is the most effective Device simulations are used to show how crosstalk propagates via the heavily doped bulk and to predict the nature of substrate crosstalk in CMOS technologies integrated in uniform, lightly doped bulk substrates, showing that in such cases the substrate noise is highly dependent on layout geometry A method of including substrate effects in SPICE simulations for circuits fabricated on epitaxial, heavily doped substrates is developed >

Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits

Local positioning will be one of the most exciting features of the next generation of wireless systems. Completely new concepts and features for wireless data transmission and transponder systems will emerge. Self-organizing sensor networks, ubiquitous computing, location sensitive billing, context dependent information services, tracking and guiding are only some of the numerous possible application areas. This article introduces different concepts of several existing and emerging systems and applications.

Wireless local positioning

A MIMO radio transceiver to support processing of multiple signals for simultaneous transmission via corresponding ones of a plurality of antennas and to support receive processing of multiple signals detected by corresponding ones of the plurality of antennas. The radio transceiver provides, on a single semiconductor integrated circuit, a receiver circuit or path for each of a plurality of antennas and a transmit circuit or path for each of the plurality of antennas. Each receiver circuit downconverts the RF signal detected by its associated antenna to a baseband signal. Similarly, each transmit path upconverts a baseband signal to be transmitted by an assigned antenna.

Multiple-input multiple-output radio transceiver

https://calhoun.nps.edu/bitstream/10945/24839/1/singlesidebandtr00elli.pdf

Single sideband transmission by envelope elimination and restoration.

A modified preamble is used by extended devices that operate at higher rates, MIMO or other extensions relative to strict 802.11a-compliant devices. The extended devices might use multiple antenna techniques (MIMO), where multiple data streams are multiplexed spatially and/or multi-channel techniques, where an extended transmitter transmits using more than one 802.11a channel at a time. Such extensions to IEEE 802.11a can exist in extended devices. The modified preamble is usable for signaling, to legacy devices as well as extended devices, to indicate capabilities and to cause legacy devices or extended devices to defer to other devices such that the common communication channel is not subject to unnecessary interference. The modified preamble is also usable for obtaining MIMO channel estimates and/or multi-channel estimates. The modified preamble preferably includes properties that facilitate detection of conventional and/or extended modes (“mode detection”) and provides some level of coexistence with legacy IEEE 802.11a devices.

Modified preamble structure for ieee 802.11a extensions to allow for coexistence and interoperability between 802.11a devices and higher data rate, mimo or otherwise extended devices

A 5-GHz transceiver comprising the RF and analog circuits of an IEEE 802.11a-compliant WLAN has been integrated in a 0.25-/spl mu/m CMOS technology. The IC has 22-dBm maximum transmitted power, 8-dB overall receive-chain noise figure and -112-dBc/Hz synthesizer phase noise at 1-MHz frequency offset.

/pdf/a-5-ghz-cmos-transceiver-for-ieee-802-11a-wireless-lan-4rz2604rta.pdf

A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems

This paper presents a CMOS RF power amplifier that employs a digital polar architecture to improve the overall power efficiency when amplifying signals with high linearity requirements. The power amplifier comprises 64 parallel RF amplifiers that are driven by a constant envelope RF phase-modulated signal. The unit amplifiers are digitally activated by a 6-bit envelope code to construct a non-constant envelope RF output, thereby performing a digital-to-RF conversion. In order to suppress the spectral images resulting from the discrete-time to continuous-time conversion of the envelope, the use of oversampling and four-fold linear interpolation is explored. An experimental prototype of the polar amplifier has been integrated in a 0.18- mum CMOS technology, occupies a total die area of 1.8 mm2 , operates at a 1.6-GHz carrier frequency with a channel bandwidth of 20 MHz. For an OFDM signal, it achieves a power-added efficiency of 6.7% with an EVM of - 26.8 dB while delivering 13.6 dBm of linear output power and drawing 145 mA from a 1.7-V supply.

A Digitally Modulated Polar CMOS Power Amplifier With a 20-MHz Channel Bandwidth

This paper introduces a CMOS radio-frequency (RF) power amplifier that uses parallel amplification to provide high efficiency over a broad range of output power. Three binary-weighted class-F unit amplifiers act in conjunction with an efficient power-combination network to provide a digital-to-analog conversion between a 3-b control signal and the amplitude of the output RF signal. The power-combination network is based on quarter-wavelength transmission lines that also serve as class-F harmonic terminations. A pMOS switch to the positive supply rail is used to avoid power dissipation when a unit amplifier is shut down. The parallel-amplifier architecture, integrated in a 0.25-/spl mu/m CMOS technology, occupies an active die area of 0.43 mm/sup 2/, operates at 1.4 GHz from a 1.5-V supply, and provides an output power adjustment range of 7-304 mW. The amplifier achieves a maximum power-added efficiency (PAE) of 49% and maintains a PAE of greater than 43% over the range of 100-300 mW.

A CMOS RF power amplifier with parallel amplification for efficient power control

Multiple power amplifiers in an RF front end are coupled to multiple antennas without diversity switching between the PAs and antennas. Diversity switches direct signals to broadcast by a selected antenna to a PA coupled to the selected antenna. Multiple LNAs are similarly coupled to the diverse antennas. Having one PA and LNA set for each antenna removes the need for diversity switching between the PA/LNAs and each antenna improving signal reception. In one embodiment, a single external PA performs broadcast functions and plural on-chip LNAs are used for reception. In another embodiment, phase shifters are coupled to each PA and LNA, which provide beam forming capability for broadcasts, and in phase signal combinations for received signals.

Method and apparatus for signal power loss reduction in RF communication systems

A dual band radio is constructed using a primary and secondary transceiver. The primary transceiver is a complete radio that is operational in a stand alone configuration. The secondary transceiver is a not a complete radio and is configured to re-use components such as fine gain control and fine frequency stepping of the primary transceiver to produce operational frequencies of the secondary transceiver. The primary transceiver acts like an intermediate frequency device for the secondary transceiver. Switches are utilized to divert signals to/from the primary transceiver from/to the secondary transceiver. The switches are also configured to act as gain control devices. Antennas are selected using either wideband or narrowband antenna switches that are configured as a diode bridge having high impedance at operational frequencies on control lines that bias the diodes.

D. Su

Papers

A 5-GHz CMOS transceiver for IEEE 802.11a wireless LAN systems

A Digitally Modulated Polar CMOS Power Amplifier With a 20-MHz Channel Bandwidth

A CMOS RF power amplifier with parallel amplification for efficient power control

Method and apparatus for signal power loss reduction in RF communication systems

Dual Frequency Band Wireless LAN