Image encryption using binary bitplane

Image encryption using P-Fibonacci transform and decomposition

In recent years, a number of chaos-based image encryption schemes have been proposed. In digital images, pixel is considered as the smallest element. So, most of the image encryption schemes implement diffusion and permutation operation at the pixel level. The substitution process creates diffusion. It can be done by using the substitution box (S-box). Although the S-box plays a vital role in any cryptosystem, the S-box substitution takes too much time to substitute the pixels of an image of size $ 256 \times 256$
 or more than $ 256 \times 256$
 . So, in this paper, for the low time complexity, bit level permutation is performed by extracting the binary bit planes from the plaintext image. Bit level permutation has an ability to create confusion and diffusion at the same time. A new random image is introduced to create more diffusion. The chaotic cubic-logistic and logistic map are also used in the proposed cryptosystem. Experimental results are carried out to show the efficiency of the proposed cryptosystem.

Novel image encryption cryptosystem based on binary bit planes extraction and multiple chaotic maps

Image scrambling is used to make images visually unrecognizable such that unauthorized users have difficulty decoding
the scrambled image to access the original image. This article presents two new image scrambling algorithms based on
Fibonacci p-code, a parametric sequence. The first algorithm works in spatial domain and the second in frequency
domain (including JPEG domain). A parameter, p, is used as a security-key and has many possible choices to guarantee
the high security of the scrambled images. The presented algorithms can be implemented for encoding/decoding both in
full and partial image scrambling, and can be used in real-time applications, such as image data hiding and encryption.
Examples of image scrambling are provided. Computer simulations are shown to demonstrate that the presented
methods also have good performance in common image attacks such as cutting (data loss), compression and noise. The
new scrambling methods can be implemented on grey level images and 3-color components in color images. A new
Lucas p-code is also introduced. The scrambling images based on Fibonacci p-code are also compared to the scrambling
results of classic Fibonacci number and Lucas p-code. This will demonstrate that the classical Fibonacci number is a
special sequence of Fibonacci p-code and show the different scrambling results of Fibonacci p-code and Lucas p-code.

Two Fibonacci P-code based image scrambling algorithms

This paper presents an efficient video filtering scheme and its implementation in a field-programmable logic device (FPLD). Since the proposed nonlinear, spatiotemporal filtering scheme is based on order statistics, its efficient implementation benefits from a bit-serial realization. The utilization of both the spatial and temporal correlation characteristics of the processed video significantly increases the computational demands on this solution, and thus, implementation becomes a significant challenge. Simulation studies reported in this paper indicate that the proposed pipelined bit-serial FPLD filtering solution can achieve speeds of up to 97.6 Mpixels/s and consumes 1700 to 2700 logic cells for the speed-optimized and area-optimized versions, respectively. Thus, the filter area represents only 6.6 to 10.5% of the Altera STRATIX EP1S25 device available on the Altera Stratix DSP evaluation board, which has been used to implement a prototype of the entire real-time vision system. As such, the proposed adaptive video filtering scheme is both practical and attractive for real-time machine vision and surveillance systems as well as conventional video and multimedia applications.

/pdf/cost-effective-video-filtering-solution-for-real-time-vision-2zflhk3js7.pdf

Cost-effective video filtering solution for real-time vision systems

A parallel decompositional algorithm and VLSI architecture is proposed for computation of the output of a stack filter over a single window of input samples using Fibonacci p-codes. For a subclass of positive Boolean functions, a more efficient parallel algorithm and VLSI architecture for running stack filtering is also presented. The area-time complexities of the proposed designs are estimated. >

D.Z. Gevorkian

Papers

Parallel algorithms and VLSI architectures for stack filtering using Fibonacci p-codes