Mechanical and chemical recycling of solid plastic waste.

IEEE transactions on computer-aided design of integrated circuits and systems : a publication of the IEEE Circuits and Systems Society

VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)

High-performance parallel computer architecture and systems have been improved at a phenomenal rate. In the meantime, VLSI computer-aided design (CAD) software for multibillion-transistor IC design has become increasingly complex and requires prohibitively high computational resources. Recent studies have shown that, numerous CAD problems, with their high computational complexity, can greatly benefit from the fast-increasing parallel computation capabilities. However, parallel programming imposes big challenges for CAD applications. Fully exploiting the computational power of emerging general-purpose and domain-specific multicore/many-core processor systems, calls for fundamental research and engineering practice across every stage of parallel CAD design, from algorithm exploration, programming models, design-time and run-time environment, to CAD applications, such as verification, optimization, and simulation. This journal special section will cover recent progress on parallel CAD research, including algorithm foundations, programming models, parallel architectural-specific optimization, and verification. More specifically, papers with in-depth and extensive coverage of the following topics will be considered, as well as other topics relevant to the design of parallel CAD algorithms and software tools. 1. Parallel algorithm design and specification for CAD applications 2. Parallel programming models and languages of particular use in CAD 3. Runtime support and performance optimization for CAD applications 4. Parallel architecture-specific design and optimization for CAD applications 5. Parallel program debugging and verification techniques particularly relevant for CAD The papers should be submitted via the Manuscript Central website and should adhere to standard ACM TODAES formatting requirements (http://todaes.acm.org/). The page count limit is 25.

Parallel CAD: Algorithm Design and Programming Special Section Call for Papers TODAES: ACM Transactions on Design Automation of Electronic Systems

Waste Printed Circuit Boards recycling: an extensive assessment of current status

A new test application scheme is proposed for low-power scan testing, which is able to compress test data significantly. A combination of a scan architecture and an existent test compression scheme can compress test data even better. Test power can be reduced greatly based on the new test application scheme, according to which only a subset of scan flip-flops shifts a test vector or captures test responses in any clock cycle. Test response data can be another important problem. A new test response compaction scheme called selective test response collection is proposed to reduce test response data. Selective test response collection combines with a structure-based test response compactor, according to which many test response data can be dropped. Experimental results show that the proposed test application scheme can efficiently reduce test power, compress test stimulus data, and compact test response data while test application cost can be well-controlled.

Selective Test Response Collection for Low-Power Scan Testing with Well-Compressed Test Data

Fatigue problems about large sized structure components ,such as bridge crane girder , has always been the bottleneck of mechanical products lightweight, reliability, security. In order to study fatigue problem about crane girder in the actual conditions, the dangerous spot of the girder is identified by using the finite element method to analyze structural stress. By simplified model , set up to reflect the main beam welding details of the characteristics of the small size of the process welding fatigue specimen model, and carried out a series of fatigue life test. Specimen fatigue test results quantitative descript the actual fatigue life of the bridge crane girder welded structures. By data fitting, the S-N curve equation of the bridge crane girder include the specific materials, the stress ratio, the welding process and special structure is obtained. It provides a scientific basis and practical methods to solve weld fatigue life design and the remaining life prediction about the crane girder.

Fatigue Research on Welding Joint of the Main Girder in Bridge Crane

This paper proposes a new flow control scheme in VCT-switched irregular networks. Based on the new scheme, a novel deadlock-free fully adaptive routing algorithm is in-troduced. The algorithm does not need any virtual channel. It requires that each input port of a switch holds at least two 1-packet-sized buffers. The flow control scheme is proposed based on a baseline routing scheme, where the downstream nodes check the number of safe buffers at the upstream nodes. The proposed fully adaptive routing algorithm is on the basis of different baseline routing schemes: updown, and multiple spanning tree based routing schemes. Extensive simulation results validate the effectiveness of the proposed method as compared to well-known existing approaches.

Deadlock-Free Fully Adaptive Routing in Irregular Networks without Virtual Channels

This paper presents a method for fault-tolerant broadcasting in faulty hypercubes using a new metric called local safety. A new concept of the broadcast subcube is introduced, based on which various techniques are proposed to improve the performance of a broadcast algorithm. An unsafe hypercube can be split into a set of maximal safe sub-cubes. We show that if these maximal safe subcubes meet certain requirements given in the paper, broadcasting can still be carried out successfully, and in some cases optimal broadcast is still possible. The sufficient condition for optimal broadcasting is also presented. Limited backtracks are utilized in the process of broadcasting by setting up a partial broadcast tree. Extensive simulation results are presented.

https://www.cse.fau.edu/~jie/research/publications/Publication_files/hypercubes.pdf

Local-Safety-Information-Based Fault-Tolerant Broadcasting in Hypercubes

This paper presents a method to cope with fault-tolerant broadcasting in hypercube multicomputers with both node and link faults. The local safety concept is extended to faulty hypercubes with both node and link faults. The local-safety-based algorithm is used in a fully unsafe hypercube, where there is no safe node. A fully unsafe hypercube can be split into a set of maximal safe subcubes. We show that if these maximal safe subcubes meet certain requirements given in the paper, broadcasting can still be carried out successfully and in some case optimal broadcast is still possible. The method is extended to fault-tolerant routing and multicasting when the system contains both node and link faults.

Dong Xiang

Papers

Selective Test Response Collection for Low-Power Scan Testing with Well-Compressed Test Data

Fatigue Research on Welding Joint of the Main Girder in Bridge Crane

Deadlock-Free Fully Adaptive Routing in Irregular Networks without Virtual Channels

Local-Safety-Information-Based Fault-Tolerant Broadcasting in Hypercubes

Local-safety-information-based broadcasting in hypercube multicomputers with node and link faults