Showing papers by "Eric Beyne published in 2002"

Method and system for fabrication of integrated tunable/switchable passive microwave and millimeter wave modules

Abstract: An interconnect module and a method of manufacturing the same. The method of making an interconnect module on a substrate comprises forming an interconnect section on the substrate. The interconnect section comprises at least two metal interconnect layers separated by a dielectric layer. The method further comprises forming a passive device on the substrate at a location laterally adjacent to the interconnect section. The passive device comprises at least one moveable element comprising a metal layer. The method further comprises forming the metal layer and one of the at least two metal interconnect layers from substantially the same material.

Integrated high-frequency inductors using amorphous electrodeposited Co-P core

Abstract: We have made integrated inductive components with a cobalt-phosphorous core by electrodeposition and characterized them. Electrodeposited Co-P is considered an alternative to nickel-iron alloys, which have similar magnetic properties but lower electrical resistivity. The inductive components show a steady inductance up to 10 MHz.

Fabrication of integrated tunable/switchable passive microwave and millimeter wave modules

Abstract: An interconnect module and a method of manufacturing the same is described comprising: a substrate, an interconnect section formed on the substrate, and a variable passive device section formed on the substrate located laterally adjacent to the interconnect section. The interconnect section has at least two metal interconnect layers separated by a dielectric layer and the variable passive device has at least one moveable element. The moveable element is formed from a metal layer which is formed from the same material and at the same time as one of the two interconnect layers. The moveable element is formed on the dielectric layer and is released by local removal of the dielectric layer. Additional interconnect layers and intermediate dielectric layers may be added.

Compensating differences between measurement and calibration wafer in probe-tip calibrations

Abstract: Differences in probe-tip-to-line geometry and substrate permittivity between measurement and calibration wafer deteriorate measurement accuracy. In this paper, we compare the accuracy of several models for the probe-to-line transition based on measurements as well as 3-D simulations of various GaAs CPW lines. This shows that 3-D simulations may be used to determine the parasitics at the probe tip as an alternative to measurement based methods. In general, models using 4 error-parameters are preferred to the Y/sub p/- or TL-based model as they provide a higher accuracy while the same amount of measurements is required to implement them.

Accurate RF electrical characterisation of CSPs using MCM-D thin film technology

Abstract: The thin film multi-layer MCM-D (multi chip module-deposited) technology developed at IMEC is used for characterising the RF electrical performance of two CSPs (chip scale packages). The measurement technique, called MoPoM, (MCM-on-package-on-MCM) enables accurate measurements and de-embedding, apart from allowing for different measurement structure designs on a single mask. The packages chosen are a 120-pin PBGA (plastic ball grid array) and an 80-pin PSGA (polymer stud grid array). Lumped element models extracted from measurements and 3D simulations show good agreement with the measurements up to 6 GHz for the BGA and 5 GHz for the PSGA. The electrical performance of the packages is compared at 1.8 GHz (GSM), 2.4 GHz (Bluetooth) and 5.2 GHz (HiperLAN) and it can be seen that at 5.2 GHz, both packages cannot be used without design modifications. We also show that the influence of encapsulant is significant, while package loading is not, at microwave frequencies and also briefly mention the crosstalk effects. We demonstrate significant degradation in the performance of a 5.2 GHz MCM-D low noise amplifier (LNA) after packaging. A drastic improvement in package performance is observed by matching the package interconnects to 50 /spl Omega/.

Distributed circuit models for near-CSP interconnects

Abstract: At frequencies beyond 1 GHz, there is a large difference between the on-chip and off-chip performance, since the package behaves as a passive element and influences the electrical behaviour. An accurate model of the package is necessary to predict this off-package behaviour and it serves as an input to the chip designer for 'chip-package co-design'. However, this is not the only requirement from the model. With chip scale packages being re-designed for different RF applications, the package model is expected to accommodate the variable physical dimensions as model parameters - in other words, be scalable. Several papers in the literature use simple and complex lumped element models to represent package interconnections (Z. Yang et al, WESCON/'95, pp. 106-110, 1995; M.F. Caggiano et al, Proc. 48th IEEE ECTC, pp. 1280-1285, 1998) but there are a number of simple distributed models as well (C.Y. Chung, Proc. 47th IEEE ECTC, pp. 304-309, 1997). However, H. Liang et al (Microwave Symp. Dig., IEEE MTT-S Int., vol. 1, pp. 65-68, 2000) proposed a preliminary "hybrid circuit model" for the BGA transition. For lumped element models, apart from suffering from loss of accuracy at high frequencies, it is almost impossible to study the effect of individual components in the overall package interconnect. In this work, we have developed distributed circuit models for two near-CSPs, namely the polymer stud grid array (PSGA) and the ball grid array (BGA). The differences in the model topology are due to the approaches used for the package routing and consequently the mode of signal propagation. Apart from achieving excellent accuracy up to 8 GHz, both the models can be scaled for changes in the physical dimensions of the package interconnect.

Electrical characterisation of BGA package for RF applications

Abstract: This paper highlights the electrical behaviour of the interconnects on a 120‐pin Ball Grid Array (BGA) package from 500 MHz upto 8 GHz. The measurements are made using IMEC's MCM‐D thin film technology as the substrate and with a test set‐up called MoPoM (MCM‐on‐Package‐on‐MCM). The interconnects are classified based on length and measured with adjacent interconnects grounded as well as floating. Circuit models are extracted from the measurement and the simulation respectively for an RF interconnect including the wirebond. Comparison of the circuit models with each other and with the measurement show agreement atleast upto 6 GHz. One of the interconnects is also measured before and after globtopping and a considerable change in the impedance match is observed. The effect of package loading is found to be negligible.

Elektronisches bauelement-modul und verfahren zu dessen herstellung

Abstract: Ein Anschluss-Substrat fur mindestens ein elektronisches Bauelement besitzt einen flachen Substratkorper, in dessen ebener Oberflache jeweils Innenkontakt-Hocker (3) zur Flip-Chip-Kontaktierung eines Bauelements und ggf. Ausenkontakt-Hocker (9) zum Anschluss an eine Leiterplatte jeweils durch Teilabtragung oder Verformung (2; 8) vertieft angeordnet sind. DOLLAR A Durch die Herstellung dieser Kontakt-Hocker im Heisprage-Verfahren bzw. mittels Laserabtragung konnen sie sehr klein und in einem engeren Raster als bisherige Chip-Anschlusse hergestellt werden.

Mixed assembly on PCB of wide variety components (MCM-D, SMDs, bare dies) using wire bonding and SMT

Abstract: The article describes the process flow of mixed/hybrid assembly module of a MCM-D PLL circuit that exhibiting good electrical performance. The module is a typical example of mixed/hybrid assembly consisting from wire bonding (2 levels of interconnection), mounting of bare dies, SMT on PCB. The main challenge of such type of assemblies is compatibility wire bonding and SMT. Another challenge is 2 levels of wire bonding interconnection. It was done using two type of bonding wires characterizing of different temper. Classical SMT solder reflow process was replaced by more environmentally friendly conductive adhesive glue process. It also helps to decrease thermal exposure down to 150 /spl deg/C. Temperature of 150 /spl deg/C was the highest temperature of thermal treatment this assembly. Relatively light thermal treatment eliminates warping of PCB FR4.