É
Éric Piel
Researcher at Delft University of Technology
Publications - 35
Citations - 589
Éric Piel is an academic researcher from Delft University of Technology. The author has contributed to research in topics: Integration testing & Runtime verification. The author has an hindex of 13, co-authored 35 publications receiving 577 citations. Previous affiliations of Éric Piel include Laboratoire d'Informatique Fondamentale de Lille.
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Journal ArticleDOI
A Model-Driven Design Framework for Massively Parallel Embedded Systems
Abdoulaye Gamatié,Sébastien Le Beux,Éric Piel,Rabie Ben Atitallah,Anne Etien,Philippe Marquet,Jean-Luc Dekeyser +6 more
TL;DR: The Gaspard design framework for massively parallel embedded systems uses the repetitive Model of Computation (MoC), which offers a powerful expression of the regular parallelism available in both system functionality and architecture and allows the designers to automatically generate code for formal verification, simulation and hardware synthesis from high-performance embedded systems.
Gaspard2: from MARTE to SystemC Simulation
Rabie Ben Atitallah,Philippe Marquet,Éric Piel,Samy Meftali,Smail Niar,Anne Etien,Jean-Luc Dekeyser,Pierre Boulet +7 more
TL;DR: An efficient MPSoC design environment, Gaspard2, based on a Model-Driven Engineering (MDE) methodology, that uses the new standard MARTE for high level system representation and targets SystemC code generation at the Timed Programmer View (PVT) level.
Proceedings ArticleDOI
Prioritizing Tests for Software Fault Localization
TL;DR: This paper introduces a new test case prioritization approach that maximizes the improvement of the diagnostic information per test, and minimizes the loss of diagnostic quality in the prioritized test suite.
A Model Driven Design Framework for High Performance Embedded Systems
Abdoulaye Gamatié,Sébastien Le Beux,Éric Piel,Anne Etien,Rabie Ben Atitallah,Philippe Marquet,Jean-Luc Dekeyser +6 more
TL;DR: The Gaspard design framework for high performance embedded systems uses the repetitive Model of Computation (MoC), which offers a powerful expression of the parallelism available in both system functionality and architecture, and allows the designers to automatically generate code for formal verification, simulation and hardware synthesis from high level specifications of highperformance embedded systems.
Proceedings ArticleDOI
A Model for the Measurement of the Runtime Testability of Component-Based Systems
TL;DR: A qualitative model of runtime testability that complements Binder's classical testability model, and a generic measurement framework for quantitatively assessing the degree ofruntime testability of a system based on the ratio of what can be tested at runtime vs. what would have been tested during development time are presented.