Modern computer microprocessor chips are marvels of engineering complexity. For the current 45 nm technology node, there may be nearly a billion transistors on a chip barely 1 cm2 and more than 10 000 m of wiring connecting and powering these devices distributed over 9-10 wiring levels. This represents quite an advance from the first INTEL 4004B microprocessor chip introduced in 1971 with 10 μm minimum dimensions and 2 300 transistors on the chip! It has been disclosed that advanced microprocessor chips at the 32 nm node will have more than 2 billion transistors.1 For instance, Figure 1 shows a sectional 3D image of a 90 nm IBM microprocessor, containing several hundred million integrated devices and 10 levels of interconnect wiring, designated as the back-end-of-the-line (BEOL). Since the invention of microprocessors, the number of active devices on a chip has been exponentially increasing, approximately doubling every two years. This trend was first described in 1965 by Gordon Moore,2 although the original discussion suggested doubling the number of devices every year, and the phenomenon became popularly known as Moore’s Law. This progress has proven remarkably resilient and has persisted for more than 50 years. The enabler that has permitted these advances is known as scaling, that is, the reduction of minimum device dimensions by lithographic advances (photoresists, tooling, and process integration optimization) by ∼30% for each device generation.3 It allowed more active devices to be incorporated in a given area and improved the operating characteristics of the individual transistors. It should be emphasized that the earlier improvements in chip performance were achieved with very few changes in the materials used in the construction of the chips themselves. The increase of performance with scaling * Corresponding author. E-mail: gdubois@us.ibm.com. † IBM Almaden Research Center. ‡ Stanford University. Willi Volksen received his B.S. in Chemistry (magna cum laude) from New Mexico Institute of Mining and Technology in 1972 and his Ph.D. in Chemistry/Polymer Science from the University of Massachusetts, Lowell, in 1975. He then joined the research group of Prof. Harry Gray/Dr. Alan Rembaum at the California Institute of Technology as a postdoctoral fellow and upon completion of the one-year appointment joined Dr. Rembaum at the Jet Propulsion Laboratory as a Senior Chemist in 1976. In 1977 Dr. Volksen joined the IBM Research Division at the IBM Almaden Research Center in San Jose, CA, where he is an active research staff member in the Advanced Materials Group of the Science and Technology function.

Low dielectric constant materials.

http://maldi.ch.pw.edu.pl/pomiary/Artykuly/Characterization%20of%20synthetic%20polymers%20by%20MALDI-MS%20(Prog.%20Polym.%20Sci.%2031(2006)%20277.pdf

Characterization of synthetic polymers by MALDI-MS

Low dielectric materials and films comprising same have been identified for improved performance when used as interlevel dielectrics in integrated circuits as well as methods for making same. In one aspect of the present invention, an organosilicate glass film is exposed to an ultraviolet light source wherein the film after exposure has an at least 10% or greater improvement in its mechanical properties (i.e., material hardness and elastic modulus) compared to the as-deposited film.

Mechanical Enhancement of Dense and Porous Organosilicate Materials by UV Exposure

Low dielectric constant materials with improved elastic modulus and material hardness. The process of making such materials involves providing a dielectric material and ultraviolet (UV) curing the material to produce a UV cured dielectric material. UV curing yields a material with improved modulus and material hardness. The improvement is each typically greater than or about 50%. The UV cured dielectric material can optionally be post-UV treated. The post-UV treatment reduces the dielectric constant of the material while maintaining an improved elastic modulus and material hardness as compared to the UV cured dielectric material. UV cured dielectrics can additionally exhibit a lower total thermal budget for curing than for furnace curing processes.

Ultraviolet curing processes for advanced low-k materials

Low dielectric constant films with improved elastic modulus. The method of making such coatings involves providing a porous network coating produced from a resin containing at least 2 Si—H groups and plasma curing the coating to convert the coating into porous silica. Plasma curing of the network coating yields a coating with improved modulus, but with a higher dielectric constant. The coating is plasma cured for between about 15 and about 120 seconds at a temperature less than about 350° C. The plasma cured coating can optionally be annealed. Rapid thermal processing (RTP) of the plasma cured coating reduces the dielectric constant of the coating while maintaining an improved elastic modulus as compared to the plasma cured porous network coating. The annealing temperature is typically less than about 475° C., and the annealing time is typically no more than about 180 seconds. The annealed, plasma cured coating has a dielectric constant in the range of from about 1.1 to about 2.4 and an improved elastic modulus.

Plasma curing process for porous silica thin film

A coating is formed on a substrate by depositing a solution comprising a resin containing at least 2 Si—H groups and a solvent in a manner in which at least 5 volume % of the solvent remains in the coating after deposition followed by exposing the coating to an environment comprising a basic catalyst and water at a concentration sufficient to cause condensation of the Si—H groups and evaporating the solvent from the coating to form a porous network coating. The method of the invention is particularly useful for applying low dielectric constant coatings on electronic devices.

A method of forming coatings

A method of treating the surface of a semiconductor wafer through the formation of a bonding system is provided in order to enhance the handling of the wafer during subsequent processing operations. The method generally comprises the steps of applying a release layer (10) and an adhesive (15) to different wafers (5, 20); bonding the wafers together to form a bonded wafer system; performing at least one wafer processing operation (e.g., wafer grinding, etc.) to form a thin processed wafer; debonding the wafers; and then cleaning the surface of the processed wafer with an organic solvent that is capable of dissolving the release layer or any residue thereof. The adhesive includes a vinyl - functionalized polysiloxane oligomeric resin, a Si-H functional polysiloxane oligomeric resin, a catalyst, and optionally an inhibitor, while the release layer is comprised of either a silsesquioxane -based resin or a thermoplastic resin.

Wafer Bonding System and Method for Bonding and Debonding Thereof

Silsesquioxane resins useful in forming the antireflective coating having the formula (PhSiO(3-x)/2(OH)x)m HSiO(3-x)/2(OH)x)n(MeSiO(3-x)/2(OH)x)p(RSiO(3-x)/2(OH)x)q where Ph is a phenyl group, Me is a methyl group, R is selected from ester groups and polyether groups, x has a value of 0, 1 or 2; m has a value of 0.05 to 0.95, n has a value of 0.05 to 0.95, p has a value of 0.05 to 0.95, q has a value of 0.01 to 0.30 and m + n + p + q ≈1.

Method for forming anti-reflective coating

A method for hydrolyzing chlorosilanes having at least three chlorine atoms bonded to each silicon atom to form silicone resins. The method comprises adding at least one of hydridotrichlorosilane, tetrachlorosilane, or organotrichlorosilane to a two-phase mixture comprising a non-polar organic solvent, an aqueous phase comprising 0 to about 43 weight percent hydrochloric acid, and a surface active compound selected from the group consisting of alkylsulphonic acid hydrate, alkali metal salt of alkylsulphonic acid, arysulphonic acid hydrate, and alkali metal salt of arylsulphonic acid.

Silicone resins and process for synthesis

Herein we disclose a composition, comprising a siloxane resin having the formula (Hsi03/2)a.(SiO4/2)b(HSiX3/2)c(SiX4/2)d, wherein each X is independently -0-, -OH, or -0-(CH2)m-Zn, wherein each m is independently an integer from I to about 5, Z is an 5 aromatic moiety, and each n is independently an integer from 1 to about 6; 0 < a < 1, 0 < b < 1, 0 < c < 1, 0 < d < 1, and a + b + c + d = 1. We also disclose methods for preparing the siloxane resin composition and a method of preparing an anti-reflective coating on a substrate, wherein the anti-reflective coating is derived from the siloxane resin composition.

Eric Scott Moyer

Papers

A method of forming coatings

Wafer Bonding System and Method for Bonding and Debonding Thereof

Method for forming anti-reflective coating

Silicone resins and process for synthesis

Siloxane resin-based anti-reflective coating composition having high wet etch rate