It is shown that, particularly for terrestrial cellular telephony, the interference-suppression feature of CDMA (code division multiple access) can result in a many-fold increase in capacity over analog and even over competing digital techniques. A single-cell system, such as a hubbed satellite network, is addressed, and the basic expression for capacity is developed. The corresponding expressions for a multiple-cell system are derived. and the distribution on the number of users supportable per cell is determined. It is concluded that properly augmented and power-controlled multiple-cell CDMA promises a quantum increase in current cellular capacity. >

On the capacity of a cellular CDMA system

Information Theory and Reliable Communication

Space-time codes (STC) are a class of signaling techniques, offering coding and diversity gains along with improved spectral efficiency. These codes exploit both the spatial and the temporal diversity of the wireless link by combining the design of the error correction code, modulation scheme and array processing. STC are well suited for improving the downlink performance, which is the bottleneck in asymmetric applications such as downstream Internet. Three original contributions to the area of STC are presented in this dissertation. First, the development of analytic tools that determine the fundamental limits on the performance of STC in a variety of channel conditions. For trellis-type STC, transfer function based techniques are applied to derive performance bounds over Rayleigh, Rician and correlated fading environments. For block-type STC, an analytic framework that supports various complex orthogonal designs with arbitrary signal cardinalities and array configurations is developed. In the second part of the dissertation, the Virginia Tech Space-Time Advanced Radio (VT-STAR) is designed, introducing a multi-antenna hardware laboratory test bed, which facilitates characterization of the multiple-input multiple-output (MIMO) channel and validation of various space-time approaches. In the third part of the dissertation, two novel space-time architectures paired with iterative processing principles are proposed. The first scheme extends the suitability of STC to outdoor wireless communications by employing iterative equalization/decoding for time dispersive channels and the second scheme employs iterative interference cancellation/decoding to solve the error propagation problem of Bell-Labs Layered Space-Time Architecture (BLAST). Results show that remarkable energy and spectral efficiencies are achievable by combining concepts drawn from space-time coding, multiuser detection, array processing and iterative decoding.

Space-Time Codes for High Data Rate Wireless Communications

Array processing involves manipulation of signals induced on various antenna elements. Its capabilities of steering nulls to reduce cochannel interferences and pointing independent beams toward various mobiles, as well as its ability to provide estimates of directions of radiating sources, make it attractive to a mobile communications system designer. Array processing is expected to play an important role in fulfilling the increased demands of various mobile communications services. Part I of this paper showed how an array could be utilized in different configurations to improve the performance of mobile communications systems, with references to various studies where feasibility of apt array system for mobile communications is considered. This paper provides a comprehensive and detailed treatment of different beam-forming schemes, adaptive algorithms to adjust the required weighting on antennas, direction-of-arrival estimation methods-including their performance comparison-and effects of errors on the performance of an array system, as well as schemes to alleviate them. This paper brings together almost all aspects of array signal processing.

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Application of antenna arrays to mobile communications. II. Beam-forming and direction-of-arrival considerations

We propose a general method for constructing Tanner graphs having a large girth by establishing edges or connections between symbol and check nodes in an edge-by-edge manner, called progressive edge-growth (PEG) algorithm. Lower bounds on the girth of PEG Tanner graphs and on the minimum distance of the resulting low-density parity-check (LDPC) codes are derived in terms of parameters of the graphs. Simple variations of the PEG algorithm can also be applied to generate linear-time encodeable LDPC codes. Regular and irregular LDPC codes using PEG Tanner graphs and allowing symbol nodes to take values over GF(q) (q>2) are investigated. Simulation results show that the PEG algorithm is a powerful algorithm to generate good short-block-length LDPC codes.

Regular and irregular progressive edge-growth tanner graphs

For writing data to multi-track tape, a received data set is received and segmented into unencoded subdata sets, each comprising an array having K 2 rows and K 1 columns. For each unencoded subdata set, N 1 -K 1 C1-parity bytes are generated for each row and N 2 -K 2 C2-parity bytes are generated for each column. The C1 and C2 parity bytes are appended to the ends of the row and column, respectively, to form encoded C1 and C2 codewords, respectively. All of the C1 codewords per data set are endowed with a specific codeword header to form a plurality of partial codeword objects (PCOs). Each PCO is mapped onto a logical data track according to information within the header. On each logical data track, adjacent PCOs arc merged to form COs which are modulation encoded and mapped into synchronized COs. Then T synchronized COs are written simultaneously to the data tape where T is the number of concurrent active tracks on the data tape.

Rewrite-efficient ecc/interleaving for multi-track recording on magnetic tape

A two terminal nanoscale device showing inherent stochastic behavior can be a key enabler for a wide range of applications such as stochastic computing, machine learning and neuromorphic engineering. In this article we investigate the inherent stochasticity associated with two key attributes of phase-change memory devices, namely, threshold switching and memory switching. The physical origin of this stochasticity is traced to the differences in the atomic configurations of the amorphous phase created via the melt-quench process after each RESET operation, which is validated by simulation and experimental results. We also present experimental results for one specific application namely, a true random number generator.

Inherent stochasticity in phase-change memory devices

A method and apparatus for encoding a plurality of successive m-bit binary data words to produce a plurality of successive of n-bit binary code words, where n and m are positive integers and n is greater than m, for supply to a magnetic recording channel Each m-bit binary data word is partitioned into a plurality of blocks of bits, and at least one said blocks of bits in each m-bit binary data word is encoded in accordance with a finite-state coding scheme to produce a plurality of successive n-bit binary code words At least one stage of violation correction which transforms the plurality of successive n-bit binary code words Violation correction includes detecting the occurrence of any of a plurality of prohibited bit patterns at one or more predetermined locations within each n-bit binary coded word, and replacing any prohibited bit pattern so detected by a corresponding substitute bit pattern The finite-state coding scheme, the prohibited bit patterns, and corresponding substitute bit patterns are predetermined such that in a serial bit-steam comprising the successive n-bit binary code words, the maximum number of consecutive bits of a first value is limited to a first predetermined number j, where b greater or equal to 2, and the maximum number of consecutive bits of the a second value is limited to a second predetermined number k

Method and system for encoding data for high performance error control

http://www.nt.ntnu.no/users/skoge/prost/proceedings/ifac11-proceedings/data/html/papers/3537.pdf

Nanopositioning for storage applications

The invention is directed to a method for wear-leveling cells or pages or sub-pages or blocks of a memory such as a flash memory, the method comprising:—receiving (S 10 ) a chunk of data to be written on a cell or page or sub-page or block of the memory;—counting (S 40 ) in the received chunk of data the number of times a given type of binary data ‘0’ or ‘I’ is to be written; and—distributing (S 50 ) the writing of the received chunk of data amongst cells or pages or sub-pages or blocks of the memory such as to wear-level the memory with respect to the number of the given type of binary data ‘0’ or ‘I’ counted in the chunk of data to be written.

Evangelos Eleftheriou

Papers

Rewrite-efficient ecc/interleaving for multi-track recording on magnetic tape

Inherent stochasticity in phase-change memory devices

Method and system for encoding data for high performance error control

Nanopositioning for storage applications

Wear-level of cells/pages/sub-pages/blocks of a memory