It is shown that, particularly for terrestrial cellular telephony, the interference-suppression feature of CDMA (code division multiple access) can result in a many-fold increase in capacity over analog and even over competing digital techniques. A single-cell system, such as a hubbed satellite network, is addressed, and the basic expression for capacity is developed. The corresponding expressions for a multiple-cell system are derived. and the distribution on the number of users supportable per cell is determined. It is concluded that properly augmented and power-controlled multiple-cell CDMA promises a quantum increase in current cellular capacity. >

On the capacity of a cellular CDMA system

Information Theory and Reliable Communication

Space-time codes (STC) are a class of signaling techniques, offering coding and diversity gains along with improved spectral efficiency. These codes exploit both the spatial and the temporal diversity of the wireless link by combining the design of the error correction code, modulation scheme and array processing. STC are well suited for improving the downlink performance, which is the bottleneck in asymmetric applications such as downstream Internet. Three original contributions to the area of STC are presented in this dissertation. First, the development of analytic tools that determine the fundamental limits on the performance of STC in a variety of channel conditions. For trellis-type STC, transfer function based techniques are applied to derive performance bounds over Rayleigh, Rician and correlated fading environments. For block-type STC, an analytic framework that supports various complex orthogonal designs with arbitrary signal cardinalities and array configurations is developed. In the second part of the dissertation, the Virginia Tech Space-Time Advanced Radio (VT-STAR) is designed, introducing a multi-antenna hardware laboratory test bed, which facilitates characterization of the multiple-input multiple-output (MIMO) channel and validation of various space-time approaches. In the third part of the dissertation, two novel space-time architectures paired with iterative processing principles are proposed. The first scheme extends the suitability of STC to outdoor wireless communications by employing iterative equalization/decoding for time dispersive channels and the second scheme employs iterative interference cancellation/decoding to solve the error propagation problem of Bell-Labs Layered Space-Time Architecture (BLAST). Results show that remarkable energy and spectral efficiencies are achievable by combining concepts drawn from space-time coding, multiuser detection, array processing and iterative decoding.

Space-Time Codes for High Data Rate Wireless Communications

Array processing involves manipulation of signals induced on various antenna elements. Its capabilities of steering nulls to reduce cochannel interferences and pointing independent beams toward various mobiles, as well as its ability to provide estimates of directions of radiating sources, make it attractive to a mobile communications system designer. Array processing is expected to play an important role in fulfilling the increased demands of various mobile communications services. Part I of this paper showed how an array could be utilized in different configurations to improve the performance of mobile communications systems, with references to various studies where feasibility of apt array system for mobile communications is considered. This paper provides a comprehensive and detailed treatment of different beam-forming schemes, adaptive algorithms to adjust the required weighting on antennas, direction-of-arrival estimation methods-including their performance comparison-and effects of errors on the performance of an array system, as well as schemes to alleviate them. This paper brings together almost all aspects of array signal processing.

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Application of antenna arrays to mobile communications. II. Beam-forming and direction-of-arrival considerations

We propose a general method for constructing Tanner graphs having a large girth by establishing edges or connections between symbol and check nodes in an edge-by-edge manner, called progressive edge-growth (PEG) algorithm. Lower bounds on the girth of PEG Tanner graphs and on the minimum distance of the resulting low-density parity-check (LDPC) codes are derived in terms of parameters of the graphs. Simple variations of the PEG algorithm can also be applied to generate linear-time encodeable LDPC codes. Regular and irregular LDPC codes using PEG Tanner graphs and allowing symbol nodes to take values over GF(q) (q>2) are investigated. Simulation results show that the PEG algorithm is a powerful algorithm to generate good short-block-length LDPC codes.

Regular and irregular progressive edge-growth tanner graphs

Equalization and noise prediction followed by sequence detection and postprocessing are studied for double-layer perpendicular recording channels that are corrupted by electronics and transition noise. The performance of various outer coding schemes, such as conventional Reed-Solomon codes with 8and 10-bit symbols and low-density parity check codes, is evaluated, and a signal-processing and coding perspective is presented for both longitudinal and perpendicular recording channels. Finally, the capacity of recording channels is characterized.

Perpendicular and longitudinal recording: a signal-processing and coding perspective

Machine learning has emerged as the dominant tool for implementing complex cognitive tasks that require supervised, unsupervised, and reinforcement learning. While the resulting machines have demonstrated in some cases even super-human performance, their energy consumption has often proved to be prohibitive in the absence of costly super-computers. Most state-of-the-art machine learning solutions are based on memory-less models of neurons. This is unlike the neurons in the human brain, which encode and process information using temporal information in spike events. The different computing principles underlying biological neurons and how they combine together to efficiently process information is believed to be a key factor behind their superior efficiency compared to current machine learning systems. Inspired by the time-encoding mechanism used by the brain, third generation spiking neural networks (SNNs) are being studied for building a new class of information processing engines. 
Modern computing systems based on the von Neumann architecture, however, are ill-suited for efficiently implementing SNNs, since their performance is limited by the need to constantly shuttle data between physically separated logic and memory units. Hence, novel computational architectures that address the von Neumann bottleneck are necessary in order to build systems that can implement SNNs with low energy budgets. In this paper, we review some of the architectural and system level design aspects involved in developing a new class of brain-inspired information processing engines that mimic the time-based information encoding and processing aspects of the brain.

Low-Power Neuromorphic Hardware for Signal Processing Applications.

Multilevel-cell (MLC) storage is a typical way for achieving higher capacity and thus lower cost per bit in memory technologies. In phase-change memory (PCM) MLC storage is seriously hampered by the phenomenon of resistance drift and the impact of temperature. Drift and temperature resilience is achieved through the use of a specific non-resistance-based cellstate metric. A statistical experimental characterization of PCM test devices in the presence of drift and at elevated temperatures is performed, and I-V characteristics are measured. The comparison of conventional resistance and a new enhanced (eM) metric demonstrates for the first time that reliable 2 bits/cell storage and subsequent data retention can be achieved in PCM cell arrays in the presence of temperature variation of the 50 °C magnitude. This development opens up the possibility for practical MLC storage in PCM chips.

Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures

NAND Flash memory is not only the ubiquitous storage medium in consumer applications, but has also started to appear in enterprise storage systems as well. MLC and TLC Flash technology made it possible to store multiple bits in the same silicon area as SLC, thus reducing the cost per amount of data stored. However, at current sub-20nm technology nodes, MLC Flash devices fail to provide the levels of raw reliability, mainly cycling endurance, that are required by typical enterprise applications. Advanced signal-processing and coding schemes are needed to improve the Flash bit error rate and thus elevate the device reliability to the desired level. In this paper, we report on the use of adaptive voltage thresholds in the read operation of NAND Flash devices. We discuss how the optimal read voltage thresholds can be determined, and assess the benefit of adapting the read voltage thresholds in terms of cycling endurance, data retention and resilience to read disturb.

Using adaptive read voltage thresholds to enhance the reliability of MLC NAND flash memory systems

The feasibility of data storage on magnetic tape at an areal recording density of 6.7 Gbit/in employing barium-ferrite (BaFe) particulate media was demonstrated in 2006 in a stringent demo. Recently, progress in BaFe media design has been made in three areas as compared with the medium used for the 6.7 Gbit/in2 demo: i) by using ultrafine BaFe magnetic particles, achieving a reduction in particle volume from 2100 to 1800 nm3; ii) by increasing the perpendicular squareness ratio from 0.52 to 0.7; iii) by achieving a smoother tape surface, effectively reducing surface roughness from 1.7 to 0.8 nm. This paper describes the characteristics of the new BaFe particles and medium, and discusses their potential for achieving areal recording densities as high as 20 Gbit/in2.

Evangelos Eleftheriou

Papers

Perpendicular and longitudinal recording: a signal-processing and coding perspective

Low-Power Neuromorphic Hardware for Signal Processing Applications.

Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures

Using adaptive read voltage thresholds to enhance the reliability of MLC NAND flash memory systems

Barium-Ferrite Particulate Media for High-Recording-Density Tape Storage Systems