Organic thin film transistor (OTFT) based device modeling and circuit application is a rapidly emerging research area. Taking cognizance of this fact, our paper reviews various basic to advanced OTFT structures, their performance parameters, materials of individual OTFT layers, their molecular structures, OTFT charge transport phenomena, and fabrication techniques. The performance of p- and n-type conducting polymer and small molecule organic semiconductors are reviewed primarily in terms of field effect mobility, current on/off ratio, and operating voltage for various OTFT structures. Moreover, different organic/inorganic materials for realizing the dielectric layer, electrodes, and the substrate in an OTFT are analyzed. Some of the compact models that are essential for predicting and optimizing the device performance are described that takes into account the mobility enhancement factor and channel length modulation. A detailed study of the single gate, dual gate, vertical channel, and cylindrical gate O...

Organic Thin Film Transistors: Structures, Models, Materials, Fabrication, and Applications: A Review

Physical Concepts of High‐Field, Thin‐Film Electroluminescence Devices

The first dual-gate thin-film transistor (DGTFT) was reported in 1981 with CdSe as the semiconductor. Other TFT technologies such as a-Si:H and organic semiconductors have led to additional ways of making DGTFTs. DGTFTs contain a second gate dielectric with a second gate positioned opposite of the first gate. The main advantage is that the threshold voltage can be set as a function of the applied second gate bias. The shift depends on the ratio of the capacitances of the two gate dielectrics. Here we review the fast growing field of DGTFTs. We summarize the reported operational mechanisms, and the application in logic gates and integrated circuits. The second emerging application of DGTFTs is sensitivity enhancement of existing ion-sensitive field-effect transistors (ISFET). The reported sensing mechanism is discussed and an outlook is presented. Dual-gate thin-film transistors (DGTFTs) have gained popularity in recent years. The additional second gate allows controlled shifting of the threshold voltage. The shift depends on the ratio of the capacitances of the two gate dielectrics. We summarize the reported operation mechanism and review the application of DGTFTs in both integrated circuits and sensors. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

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Dual‐Gate Thin‐Film Transistors, Integrated Circuits and Sensors

A high resolution flat panel for radiation imaging (20) includes an array of pixels (22) arranged in rows and columns. Gate lines (24) interconnect the pixels (22) of the rows while source lines (26) interconnect the pixels of the columns. Gate driver circuits (28) provide gate pulses to the gate lines in succession in response to input from a control circuit (30) to select the pixels on a row-by-row basis. The source lines (26) lead to charge amplifiers (32) for sensing the signal charges stored by the pixels when the pixels are selected. At least one pair of adjacent pixels in each row of the array shares a source line. Gating of the pairs of pixels in the rows that share a source line is controlled by control logic to ensure that signal charges stored by only one of those pixels is applied to a shared source line at a time. This allows the number of charge amplifiers in the flat panel to be reduced while maintaining high resolution.

High resolution flat panel for radiation imaging

This research paper analyzes the static and dynamic behavior of dual-gate organic thin film transistors (DG-OTFTs) based universal logic gates using the Atlas 2-D numerical device simulator. The electrical characteristics and performance parameters of pentacene based DG-OTFT is evaluated and verified with respect to the reported experimental results. The NAND and NOR logic gate circuits are realized using $$p$$ p -type designs in diode-load logic (DLL) and zero- $$V_{gs}$$ V g s -load logic (ZVLL). The results show that the logic functions in ZVLL configuration outperforms the DLL ones mainly in terms of noise margin, gain and voltage swing; however, there is a trade-off in terms of speed. The ZVLL NAND gate demonstrates an increment of 16 and 32 % in voltage swing and noise margin, respectively in comparison to the DLL one. Besides this, the gain also increases by 1.5 times in ZVLL mode. On the contrary, the DLL configuration demonstrates a significant reduction of 64 % in the propagation delay in comparison to the ZVLL. Similarly, NOR gate shows an increment of 24 and 30 % in voltage swing and noise margin, respectively under ZVLL configuration. However, the propagation delay for DLL NOR configuration is one-fourth of that of its ZVLL counterpart.

Static and dynamic characteristics of dual gate organic TFT based NAND and NOR circuits

This paper reports the measured results of a thin-film transistor (TFT) for the flat panel display application. The TFT has a double-gate structure and uses a very thin (80-100 A) CdSe film as the semiconductor. The device has less than 10-10-A zero-gate-bias leakage current and greater than 106ON/OFF current ratio. It has been found that the only severe stability requirement on the device is in the OFF condition, Both dc and dynamic life tests have been made. The device performs better in the multiplexed condition than in the dc condition. Excellent maintenance of device parameters has been observed.

F.C. Genovese

Papers

A thin-film transistor for flat planel displays