This paper presents a novel approach for designing and implementing in-memory logic operations. The uniqueness of this work is the development of SIMPLE, a framework that optimizes the execution of an arbitrary logic function, while considering all the constraints involved in performing it within a memristive memory. SIMPLE automatically generates a defined sequence of atomic memristor-aided logic NOR operations, whose implementation can be facilitated efficiently within the memory. Motivated to overcome the memory-CPU bottleneck, this approach designs an optimal solution in terms of performance by exploiting the parallelism of the memristor-aided logic NOR gates. SIMPLE achieves performance speedups of 1.94x compared to a previous work and 1.48x compared to a naive optimization based on standard synthesis tools.

SIMPLE MAGIC: synthesis and in-memory mapping of logic execution for memristor-aided logic

Memristor, which is a two-terminal nanodevice, widely used in various fields, e.g., machine learning and neuromorphic systems, has attracted much attention these years. Memristor can also be used to realize an implication logic gate and thus logic circuits. However, the fanouts in a memristor-based logic circuit have some constraints and need to be processed with special care. On the other hand, in addition to the number of memristors, the number of operational pulses is another metric to measure the quality of a memristor-based logic circuit. Hence, in this paper, we propose a synthesis algorithm to deal with the fanout problems in memristor-based logic circuits using implication logic gates for having a minimal number of operational pulses. We conducted experiments on a set of MCNC benchmarks. The experimental results show that the proposed algorithm can reduce 29% operational pulses and 36% memristor count on average compared with the state-of-the-art.

On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses

Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing

Memristor is a two terminal passive circuit element that can be used in non-volatile storage applications. In addition, memristor can also be used to implement logic functions. This paper presents the design of adder circuits in memristor crossbar. We have used the MAGIC design style to implement the gates required for the adder circuits. The implementation is based on in-memory computing where the input data is assumed to be stored in the crossbar, and the processing is done in the storage unit itself. We have estimated the gate delay and switching energy using SPICE simulation under Cadence Virtuoso environment. We have evaluated the latency of the half adder, full adder, 4-bit ripple carry, 4-bit carry lookahead adder and generalized the latency and area estimates for an n-bit ripple-carry adder. The proposed method is compared with an alternate memristor based synthesis method (viz. IMPLY) and is found to be more efficient in terms of latency and energy with similar area overheads.

Efficient implementation of adder circuits in memristive crossbar array

An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD)

Research on memristors have drawn wide attentionin recent years as these devices exhibit unique properties whichcan be used to perform various logic and memory operations. Memristor based memory systems are expected to replace flashmemory devices in the near future. In addition, synthesis andoptimization of boolean functions using memristors are becomingan important area of research. There are various logic designstyles for memristors that have been reported, among which theone that implements material implication operation forms thebasis of the present work. An IMPLY gate implements the impli-cation operation, and can be realized using only two memristorsand one resistance. In the present work, the widely availablesynthesis tool ABC is used for synthesizing an arbitrary booleanfunction into a netlist of IMPLY gates. To optimize the numberof memristors to be used for the realization, we propose anINVERSE-IMPLY gate for handling fanouts in the intermediatenetlist generated by the ABC tool. Synthesis experiments havebeen carried out on standard benchmark functions of up to 16variables, which show an overall improvement of 22.8% in thenumber of steps required for evaluation over an existing state-of-the-art method. For functions with 9 or more variables, theimprovement increases to 35.5%.

An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates

A novel 3D memristive crossbar architecture and Boolean logic computation on it is explored in the paper. The two approaches for 2D crossbar mapping-Compact and Parallel mapping schemes-are extended along with inclusion of possible parallelism between gates and the pipelining between the different layers is explored. The proposed 3D crossbar mapping schemes are compared in terms of tsteps and crossbar size required, and is also compared with the existing works on 2D crossbars for illustrating the possible advantages of 3D crossbars.

F. Lalchhandama

Papers

An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates

Mapping of Boolean Logic Functions onto 3D Memristor Crossbar

CoMIC: Complementary Memristor based in-memory computing in 3D architecture